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74LVCZ16245ADGGRE4 データシート(PDF) 2 Page - Texas Instruments |
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74LVCZ16245ADGGRE4 データシート(HTML) 2 Page - Texas Instruments |
2 / 11 page SN74LVCZ16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES278D – JUNE 1999 – REVISED AUGUST 2002 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. FUNCTION TABLE (each 8-bit section) INPUTS OPERATION OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE 1 47 24 36 48 2 25 13 |
同様の部品番号 - 74LVCZ16245ADGGRE4 |
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同様の説明 - 74LVCZ16245ADGGRE4 |
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