データシートサーチシステム |
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74V2T03 データシート(PDF) 1 Page - STMicroelectronics |
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74V2T03 データシート(HTML) 1 Page - STMicroelectronics |
1 / 7 page 1/7 June 2003 s HIGH SPEED: tPD = 5.4ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA =25°C s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL =0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS s OPERATING VOLTAGE RANGE: VCC(OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V2T03 is an advanced high-speed CMOS DUAL 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. The device can, with an external pull-up resistor, be used in wired AND configuration. This device can also be used as a led driver in any other application requiring current sink. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. 74V2T03 DUAL 2-INPUT OPEN DRAIN NAND GATE PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE T & R SOT23-8L 74V2T03STR SOT23-8L |
同様の部品番号 - 74V2T03 |
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同様の説明 - 74V2T03 |
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