NBSG14BA datasheet(3/12 Pages) ONSEMI

部品番号	NBSG14BA

部品情報	2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs

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NBSG14

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3

50

W

50

W

VTCLK

CLK

VTCLK

VEE

VCC

Figure 3. Logic Diagram

75 K

W

75 K

W

36.5 K

W

Q3

Q2

Q1

Q0

Table 2. INTERFACING OPTIONS

INTERFACING OPTIONS

CONNECTIONS

CML

Connect VTCLK and VTCLK to VCC

LVDS

Connect VTCLK and VTCLK Together

AC−COUPLED

Bias VTCLK and VTCLK Inputs within

Common Mode Range (VIHCMR)

RSECL, PECL, NECL

Standard ECL Termination Techniques

LVTTL, LVCMOS

An External Voltage (VTHR) should be Applied to the

Unused Differential Input. Nominal VTHR is 1.5 V for LVTTL

and VCC/2 for LVCMOS Inputs. This Voltage must be

within the VTHR Specification.

同様の部品番号 - NBSG14BA

メーカー	部品番号	データシート	部品情報
ON Semiconductor	NBSG14BA	390Kb / 13P	2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs July, 2006 ??Rev. 9
	NBSG14BAEVB	390Kb / 13P	2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs July, 2006 ??Rev. 9
	NBSG14BAR2	390Kb / 13P	2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs July, 2006 ??Rev. 9

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同様の説明 - NBSG14BA

メーカー	部品番号	データシート	部品情報
ON Semiconductor	NBSG14	390Kb / 13P	2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs July, 2006 ??Rev. 9
	NBSG111	174Kb / 11P	2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs January, 2007 ??Rev. 8
	NBSG11	81Kb / 10P	2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL* Outputs April, 2003 - Rev. 6
	NBSG11	117Kb / 12P	2.5V/3.3V SiGe 1:2 Differential Clock Driver with RSECL Outputs July, 2006 ??Rev. 8
	NBSG16	138Kb / 12P	2.5V/3.3V SiGe Differential Receiver/Driver with RSECL Outputs July, 2006 ??Rev. 14
	NBSG14	397Kb / 12P	SiGe Differential 1:4 Clock/Data Driver June, 2014 ??Rev. 17
	NBSG16BA	104Kb / 10P	2.5V/3.3V SiGe Differential Receiver/Driver with RSECLOutputs May, 2003 - Rev. 12
	NB7VQ58M	1Mb / 9P	1.8V / 2.5V / 3.3V Differential 2:1 Clock/Data Multiplexer / Translator with CML Outputs August, 2009 ??Rev. 0
	NB7L111M	256Kb / 13P	2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output January, 2006 ??Rev. 1
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