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NBSG14MNR2 データシート(PDF) 2 Page - ON Semiconductor

部品番号 NBSG14MNR2
部品情報  2.5V/3.3V SiGe Differential 1:4 Clock/Data Driver with RSECL Outputs
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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Figure 1. BGA−16 Pinout (Top View)
VTCLK
CLK
CLK
VEE
VTCLK
Q0
VEE
Q3
Q3
Q2
VCC
VCC
Q0
Q1
Q1
Q2
A
B
C
D
12
3
4
VEE
Q3
Q3
VCC
VEE
Q0
Q0
VCC
Q1
Q1
Q2
Q2
VTCLK
CLK
CLK
VTCLK
56
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NBSG14
Exposed Pad (EP)
Figure 2. QFN−16 Pinout (Top View)
Table 1. Pin Description
Pin
BGA
QFN
Name
I/O
Description
D1
1
VTCLK
Internal 50
W Termination pin. See Table 2.
C1
2
CLK
ECL, CML,
LVCMOS, LVDS,
LVTTL Input
Inverted Differential Input. Internal 75 k
W to VEE and 36.5 kW to VCC.
B1
3
CLK
ECL, CML,
LVCMOS, LVDS,
LVTTL Input
Noninverted Differential Input. Internal 75 k
W to VEE.
A1
4
VTCLK
Internal 50
W Termination Pin. See Table 2.
B2,C2
5,16
VEE
Negative Supply Voltage. All VEE Pins must be Externally Connected to
Power Supply to Guarantee Proper Operation.
A2*
6
Q3
RSECL Output
Inverted Differential Output 3. Typically Terminated with 50
W to
VTT = VCC − 2 V*
A3*
7
Q3
RSECL Output
Noninverted Differential Output 3. Typically Terminated with 50
W to
VTT = VCC − 2 V*
B3,C3
8,13
VCC
Positive Supply Voltage. All VCC Pins must be Externally Connected to
Power Supply to Guarantee Proper Operation.
A4*
9
Q2
RSECL Output
Inverted Differential Output 2. Typically Terminated with 50
W to
VTT = VCC − 2 V*
B4*
10
Q2
RSECL Output
Noninverted Differential Output 2. Typically Terminated with 50
W to
VTT = VCC − 2 V*
C4*
11
Q1
RSECL Output
Inverted Differential Output 1. Typically Terminated with 50
W to
VTT = VCC − 2 V*
D4*
12
Q1
RSECL Output
Noninverted Differential Output 1. Typically Terminated with 50
W to
VTT = VCC − 2 V*
D3*
14
Q0
RSECL Output
Inverted Differential Output 0. Typically Terminated with 50
W to
VTT = VCC − 2 V*
D2*
15
Q0
RSECL Output
Noninverted Differential Output 0. Typically Terminated with 50
W to
VTT = VCC − 2 V*
N/A
EP
Exposed Pad. The thermally exposed pad on package bottom (see case
drawing) must be attached to a heat−sinking conduit.
1. In the differential configuration when the input termination pins (VTCLK, VTCLK) are connected to a common termination voltage, if no
signal is applied then the device will be susceptible to self−oscillation.
*Devices in BGA package typically terminated with 50
W to VTT = VCC−1.5 V.


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