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SC660E データシート(PDF) 5 Page - Cypress Semiconductor

部品番号 SC660E
部品情報  SMBus System Clock Buffer for Mobile Applications
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メーカー  CYPRESS [Cypress Semiconductor]
ホームページ  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

SC660E データシート(HTML) 5 Page - Cypress Semiconductor

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SC660E
SMBus System Clock Buffer for Mobile Applications
Cypress Semiconductor Corporation
3901 North First Street
Document#: 38-07025 Rev. *A
12/17/2002
San Jose, CA 95134. Tel: 408-043-2600
Page 5 of 8
http://www.cypress.com
Electrical Characteristics
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Input Low Voltage
VIL
-
-
0.8
Vdc
-
Input High Voltage
VIH
2.0
-
-
Vdc
-
Input Low Current
IIL
-66
µA
Input High Current
IIH
66
µA
Output Low Voltage
IOL = 40mA
VOL
-
-
0.4
Vdc
All Outputs (see buffer spec)
Output High Voltage
IOH = 30mA
VOH
2.4
-
-
Vdc
All Outputs Using 3.3V Power
(see buffer spec)
Tri-State leakage Current
Ioz
-
-
10
µA
Dynamic Supply Current
Idd66
-
-
160
mA
Input frequency = 66 Mhz - All outputs on
and at 30 pF load
Idd100
-
-
220
mA
Input frequency 100 Mhz - All outputs on
and at 30 pF load
Static Supply Current
Isdd
-
-
4
mA
All outputs disabled no input clock
Short Circuit Current
ISC
25
-
-
mA
1 output at a time - 30 seconds
Input Rise Time
TIR
2.4
-
-
nS
.8 to 2.4 volts
VDD = VDD1 thru VDD5 =3.3V
±5%, , TA = -40ºC to +85ºC
Switching Characteristics
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Output Duty Cycle
-
45
50
55
%
Measured at 1.5V (50/50 in)
Buffer out/out Skew All
Buffer Outputs
tSKEW
-
-
250
pS
35 pF Load Measured at 1.5V
Buffer input to output Skew
tSKEW
2.0
4.0
5.0
nS
Jitter Cycle to Cycle*
TJCC
50
pS
@ 35 pF loading
Jitter Absolute (Peak to
Peak)*
TJabs
150
pS
@ 35 pF loading
VDD = VDD1 thru VDD5 = 3.3V
±5%, , TA = -40ºC to +85ºC
*This jitter is additive to the input clock’s jitter.


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