© 2005 Fairchild Semiconductor Corporation

DS500864

www.fairchildsemi.com

October 2003

Revised April 2005

FIN3385 • FIN3383 •

FIN3384 • FIN3386

Low Voltage 28-Bit Flat Panel Display Link

Serializers/Deserializers

General Description

The FIN3385 and FIN3383 transform 28 bit wide parallel

LVTTL (Low Voltage TTL) data into 4 serial LVDS (Low

Voltage Differential Signaling) data streams. A phase-

locked transmit clock is transmitted in parallel with the data

stream over a separate LVDS link. Every cycle of transmit

clock 28 bits of input LVTTL data are sampled and trans-

mitted.

The FIN3386 and FIN3384 receive and convert the 4/3

serial LVDS data streams back into 28/21 bits of LVTTL

data. Refer to Table 1 for a matrix summary of the Serializ-

ers and Deserializers available. For the FIN3385, at a

transmit clock frequency of 85MHz, 28 bits of LVTTL data

are transmitted at a rate of 595Mbps per LVDS channel.

These chipsets are an ideal solution to solve EMI and cable

size problems associated with wide and high-speed TTL

interfaces.

Features

s Low power consumption

s 20 MHz to 85 MHz shift clock support

s

r1V common-mode range around 1.2V

s Narrow bus reduces cable size and cost

s High throughput (up to 2.38 Gbps throughput)

s Internal PLL with no external component

s Compatible with TIA/EIA-644 specification

s Devices are offered 56-lead TSSOP packages

Ordering Code:

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

TABLE 1. Display Panel Link Serializers/Deserializers Chip Matrix

Order Number

Package Number

Package Description

FIN3383MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

FIN3384MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

FIN3385MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

FIN3386MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Part

CLK Frequency

LVTTL IN

LVDS OUT

LVDS IN

LVTTL OUT

Package

FIN3385

85

28

4

56 TSSOP

FIN3383

66

28

4

56 TSSOP

FIN3386

85

4

28

56 TSSOP

FIN3384

66

4

28

56 TSSOP