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ADM1041ARQ-REEL7 データシート(PDF) 7 Page - Analog Devices

部品番号 ADM1041ARQ-REEL7
部品情報  Secondary-Side Controller with Current Share and Housekeeping
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ADM1041ARQ-REEL7 データシート(HTML) 7 Page - Analog Devices

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ADM1041
Rev. A | Page 7 of 64
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LOCAL VOLTAGE SENSE, VLS,
AND FALSE UV CLAMP
See Figure 9.
Input Voltage Range3
2.3
VDD–2
V
Set by external resistor divider.
Stage Gain
1.3
At VLS = 1.8 V
False UV Clamp, VLS, Input Voltage Nominal,
and Trim Range
1.3
1.85
2.1
V
Clamp Trim Step
0.2
%
VRANGE
Clamp Trim Step
3.1
mV
8 bits, 255 steps, Reg 18h[7:0].
See Table 33.
Local Overvoltage
1.9
2.4
2.85
V
Nominal and Trim Range
OV Trim Step
0.15
%
VRANGE
OV Trim Step
3.7
mV
8 bits, 255 steps Reg 0Ah[7:0].
See Table 33.
Noise Filter, for OVP Function Only
5
25
µs
Local Undervoltage
1.3
1.7
2.1
V
Nominal and Trim Range
UV Trim Step
0.18
%
VRANGE
UV Trim Step
3.1
mV
8 bits, 255 steps, Reg 09h[7:0].
See Table 18.
Noise Filter, for UVP Function Only
300
600
µs
VOLTAGE ERROR AMPLIFIER, VCMP
See Figure 14.
Reference Voltage VREF_SOFT_START
1.49
1.51
V
TA = 25°C
Temperature Stability2
±100
µV/°C
−40°C ≤ TA ≤ 85°C
Long-Term Voltage Stability2
±0.2
%
Over 1,000 hr, TJ = 125°C
Soft-start Period Range
0
40
ms
Ramp is 7 bit, 127 steps
Set Soft-start Period
300
µs
Reg 10h[3:2] = 00. See Table 25.
10
ms
Reg 10h[3:2] = 01. See Table 25.
20
ms
Reg 10h[3:2] = 10. See Table 25.
40
ms
Reg 10h[3:2] = 11. See Table 25.
Unity Gain Bandwidth, GBW
1
MHz
See Figure 11.
Transconductance
1.9
2.7
3.5
mA/V
At IVCMP = ±180 µA
Source Current
250
µA
At VVCMP > 1 V
Sink Current
250
µA
At VVCMP < VDD − 1 V
DIFFERENTIAL CURRENT SENSE INPUT,
CS−, CS+
Reg 17h[7] = 0. See Table 18.
ISENSE mode. See Figure 13.
Common-Mode Range
0
VDD–2
V
Set by external divider
External Divider Tolerance Trim Range
(with respect to input)
−5
mV
Reg 16h[5:3] = 000. See Table 31.
−10
mV
Reg 16h[5:3] = 001. See Table 31.
−20
mV
Reg 16h[5:3] = 010. See Table 31.
5
mV
Reg 16h[5:3] = 100. See Table 31.
10
mV
Reg 16h[5:3] = 101. See Table 31.
20
mV
Reg 16h[5:3] = 110. See Table 31.
External Divider Tolerance Trim Step Size
20
µV
VCM = 2.0 V
(with respect to input)
39
µV
8 bits, 255 steps
78
µV
Reg 14h[7:0]. See Table 29.


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