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SI8252-IQ データシート(PDF) 11 Page - Silicon Laboratories |
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SI8252-IQ データシート(HTML) 11 Page - Silicon Laboratories |
11 / 30 page Si8250/1/2 Preliminary Rev. 0.8 11 Table 11. Reset Electrical Characteristics TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified. Parameter Conditions Min Typ Max Units RST Output Low Voltage IOL = 8.5mA, VDD = 2.5V — — 0.7 V RST Input High Voltage 0.7 x VDD —— V RST Input Low Voltage — — 0.3 x VDD V RST Input Pull-up Current RST =0.0 — 25 TBD µA VDD POR Threshold 2.0 2.1 2.2 V Missing clock detector timeout Time from last system clock ris- ing edge to start of reset — 250 650 µs Reset time delay Delay between release of any reset source and code execu- tion at location 0x0000 5.0 — — µs Minimum RST Low time to gen- erate a System Reset 6.5 — — µs VDD monitor turn-on time 100 — — µs VDD monitor supply current — 40 — µA Table 12. Flash Electrical Characteristics TA = –40 to +125 °C, VDD = 2.25 V – 2.75 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified. Parameter Conditions Min Typ Max Units Flash Size Si8250 32768(1) —— bytes Si8251, Si8252 16383(1) —— Endurance 10 K 100 K — Erase/Write Read Cycle Time TBD — — ns Erase Cycle Time 50 MHz System Clock 32 — 48 ms Write Cycle Time 50 MHz System Clock 76 — 114 µs Notes: 1. The last 512 bytes of memory are reserved. |
同様の部品番号 - SI8252-IQ |
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同様の説明 - SI8252-IQ |
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