データシートサーチシステム |
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GS88037BT-250V データシート(PDF) 5 Page - GSI Technology |
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GS88037BT-250V データシート(HTML) 5 Page - GSI Technology |
5 / 19 page Mode Pin Functions Mode Name Pin Name State Function Burst Order Control LBO L Linear Burst H Interleaved Burst Power Down Control ZZ L or NC Active H Standby, IDD = ISB GS88037BT-xxxV Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.03 6/2006 5/19 © 2002, GSI Technology Note: There is a pull-down device on the ZZ pin, so this input pin can be unconnected and the chip will operate in the default states as specified in the above table. Note: The burst counter wraps to initial state on the 5th clock. Note: The burst counter wraps to initial state on the 5th clock. Linear Burst Sequence A[1:0] A[1:0] A[1:0] A[1:0] 1st address 00 01 10 11 2nd address 01 10 11 00 3rd address 10 11 00 01 4th address 11 00 01 10 Interleaved Burst Sequence A[1:0] A[1:0] A[1:0] A[1:0] 1st address 00 01 10 11 2nd address 01 00 11 10 3rd address 10 11 00 01 4th address 11 10 01 00 Burst Counter Sequences BPR 1999.05.18 |
同様の部品番号 - GS88037BT-250V |
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同様の説明 - GS88037BT-250V |
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