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GS88037BT-200I データシート(PDF) 3 Page - GSI Technology

部品番号 GS88037BT-200I
部品情報  256K x 36 9Mb Sync Burst SRAM
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メーカー  GSI [GSI Technology]
ホームページ  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS88037BT-200I データシート(HTML) 3 Page - GSI Technology

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GS88037BT-333/300/250/200
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 2/2005
3/19
© 2002, GSI Technology
TQFP Pin Description
Symbol
Type
Description
A0, A1
I
Address field LSBs and Address Counter preset Inputs
A
I
Address Inputs
DQA
DQB
DQC
DQD
I/O
Data Input and Output pins
NC
No Connect
BW
IByte Write—Writes all enabled bytes; active low
BA, BB
I
Byte Write Enable for DQA, DQB Data I/Os; active low
BC, BD
I
Byte Write Enable for DQC, DQD Data I/Os; active low
CK
I
Clock Input Signal; active high
GW
I
Global Write Enable—Writes all bytes; active low
E1, E3
I
Chip Enable; active low
E2
I
Chip Enable; active high
G
I
Output Enable; active low
ADV
I
Burst address counter advance enable; active low
ADSP, ADSC
I
Address Strobe (Processor, Cache Controller); active low
ZZ
I
Sleep Mode control; active high
LBO
I
Linear Burst Order mode; active low
VDD
I
Core power supply
VSS
I
I/O and Core Ground
VDDQ
I
Output driver power supply
VDDQ/DNU
VDDQ or VDD (must be tied high)
or
Do Not Use (must be left floating)


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