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AD7453ART-REEL7 データシート(PDF) 6 Page - Analog Devices

部品番号 AD7453ART-REEL7
部品情報  Pseudo Differential, 555 kSPS, 12-Bit ADC in an 8-Lead SOT-23
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AD7453ART-REEL7 データシート(HTML) 6 Page - Analog Devices

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REV. 0
–6–
AD7453
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
Mnemonic
Function
VREF
Reference Input for the AD7453. An external reference in the range 100 mV to 3.5 V must be applied to this input.
The specified reference input is 2.5 V. This pin should be decoupled to GND with a capacitor of at least 0.1
mF.
VIN+
Noninverting Analog Input.
VIN–
Inverting Input. This pin sets the ground reference point for the VIN+ input. Connect to ground or to a dc offset to
provide a pseudo ground.
GND
Analog Ground. Ground reference point for all circuitry on the AD7453. All analog input signals and any external
reference signal should be referred to this GND voltage.
CS
Chip Select. Active low logic input. This input provides the dual function of initiating a conversion on the AD7453
and framing the serial data transfer.
SDATA
Serial Data. Logic output. The conversion result from the AD7453 is provided on this output as a serial data stream.
The bits are clocked out on the falling edge of the SCLK input. The data stream of the AD7453 consists of four
leading zeros followed by the 12 bits of conversion data that are provided MSB first. The output coding is straight
(natural) binary.
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input is also
used as the clock source for the conversion process.
VDD
Power Supply Input. VDD is 2.7 V to 5.25 V. This supply should be decoupled to GND with a 0.1
mF capacitor
and a 10
mF tantalum capacitor.
8-Lead SOT-23
1
AD7453
TOP VIEW
(Not to Scale)
VDD
VREF
8
2
SCLK
VIN+
7
3
CS
VIN–
6
4
SDATA
GND
5


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