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74ALVCH16823 データシート(PDF) 8 Page - NXP Semiconductors |
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74ALVCH16823 データシート(HTML) 8 Page - NXP Semiconductors |
8 / 12 page Philips Semiconductors Product specification 74ALVCH16823 18-bit D-type flip-flop (3-State) 1998 Jul 29 8 AC WAVEFORMS FOR VCC = 2.3V TO 2.7V AND VCC < 2.3V RANGE VM = 0.5 VCC VX = VOL + 0.15V VY = VOH –0.15V VOL and VOH are the typical output voltage drop that occur with the output load. V I = VCC AC WAVEFORMS FOR VCC = 3.0V TO 3.6V AND VCC = 2.7V RANGE VM = 1.5 V VX = VOL + 0.3V VY = VOH –0.3V VOL and VOH are the typical output voltage drop that occur with the output load. V I = 2.7V VM SH00017 nCP nQn VM tw tPHL VM tPLH 1/fMAX VM 3.0V or VCC whichever is less 0V 0V VOH Waveform 1. Clock (nCP) to Output (nQn) Propagation Delays, Clock Pulse Width, and Maximum Clock Pulse Frequency VM nMR VM nQn tw VM tPHL VM nCP SH00018 3.0V or VCC whichever is less 0V 3.0V or VCC whichever is less 0V 0V VOH tREC Waveform 2. Master Reset (MR) Pulse WIdth, MR to Output propagation Delay and MR to Clock Recovery Time nQn OUTPUT VM VM nCE, nDn INPUT nCP INPUT VM GND VI GND VI VOL VOH tsu tsu th th SH00155 NOTE: The data set-up and hold times for Dn or CE input to the CP input Waveform 3. Data Setup and Hold Times for the Dn or CE input to the CP input tPLZ tPZL VI nOE INPUT GND VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs enabled outputs disabled tPHZ VM VM VM tPZH VX VY SW00308 Waveform 4. 3-State Enable and Disable Times TEST CIRCUIT PULSE GENERATOR RT VIN D.U.T. VOUT CL VCC RL=500 Ω SWITCH POSITION TEST SWITCH tPLH/tPHL Open tPLZ/tPZL 2 <VCC tPHZ/tPZH GND Test Circuit for 3-State Outputs Open GND S1 2 <VCC DEFINITIONS VCC t 2.7V 2.7 – 3.6V VIN VCC 2.7V RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SW00047 RL=500 Ω Waveform 5. Load circuitry for switching times |
同様の部品番号 - 74ALVCH16823 |
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同様の説明 - 74ALVCH16823 |
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