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SN74CB3Q16811DLR データシート(PDF) 1 Page - Texas Instruments

部品番号 SN74CB3Q16811DLR
部品情報  24-BIT SWITCH WITH PRECHARGED OUTPUTS 2.5-V/3.3-V LOW-VOLTAGE FET BUS SWITCH
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

SN74CB3Q16811DLR データシート(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION/ORDERING INFORMATION
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
SN74CB3Q16811
24-BIT SWITCH WITH PRECHARGED OUTPUTS
2.5-V/3.3-V LOW-VOLTAGE FET BUS SWITCH
SCDS153B – OCTOBER 2003 – REVISED MARCH 2005
Data and Control Inputs Provide Undershoot
Clamp Diodes
Member of the Texas Instruments Widebus™
Family
Low Power Consumption (I
CC = 0.75 mA Typ)
SN74CB3Q Bus Switches Are Equivalent to
V
CC Operating Range From 2.3 V to 3.6 V
IDTQS3VH Bus Switches
Data I/Os Support 0- to 5-V Signaling Levels
5-V Tolerant I/Os With Device Powered Up or
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
Powered Down
Control Inputs Can Be Driven by TTL or
Low and Flat ON-State Resistance (r
on)
5-V/3.3-V CMOS Outputs
Characteristics Over Operating Range
I
off Supports Partial-Power-Down Mode
(r
on = 5 Ω Typ)
Operation
Rail-to-Rail Switching on Data I/O Ports
Latch-Up Performance Exceeds 100 mA Per
– 0- to 5-V Switching With 3.3-V V
CC
JESD 78, Class II
– 0- to 3.3-V Switching With 2.5-V V
CC
ESD Performance Tested Per JESD 22
B-Port Outputs Are Precharged by Bias
– 2000-V Human-Body Model
Voltage (BIASV) to Minimize Signal Distortion
(A114-B, Class II)
During Live Insertion and Hot Plugging
– 1000-V Charged-Device Model (C101)
Supports PCI Hot Plug
Supports Both Digital and Analog
Bidirectional Data Flow With Near-Zero
Applications: PCI Hot Plug, Hot Docking,
Propagation Delay
Memory Interleaving, Bus Isolation, and
Low-Distortion Signal Gating
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
io(OFF) = 4 pF Typ)
Fast Switching Frequency (f
ON = 20 MHz Max)
The SN74CB3Q16811 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of
the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows
for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device
also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
Specifically designed to support high-bandwidth applications, the SN74CB3Q16811 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74CB3Q16811DL
SSOP – DL
CB3Q16811
Tape and reel
SN74CB3Q16811DLR
–40°C to 85°C
TSSOP – DGG
Tape and reel
SN74CB3Q16811DGGR
CB3Q16811
TVSOP – DGV
Tape and reel
SN74CB3Q16811DGVR
BW811
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
The SN74CB3Q16811 is organized as two 12-bit bus switches with separate output-enable (1OE, 2OE) inputs. It
can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus
switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE
is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
The B port is precharged to bias voltage (BIASV) through the equivalent of a 10-k
Ω resistor when OE is high or if
the device is powered down (VCC = 0 V).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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