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74LVCH32373A データシート(PDF) 6 Page - NXP Semiconductors |
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74LVCH32373A データシート(HTML) 6 Page - NXP Semiconductors |
6 / 16 page 1999 Nov 24 6 Philips Semiconductors Product specification 32-bit transparent D-type latch with 5 V tolerant inputs/outputs; 3-state 74LVCH32373A RECOMMENDED OPERATING CONDITIONS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V). Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 70 °C the value of P D derates linearly with 1.8 mW/K. SYMBOL PARAMETER CONDITIONS LIMITS UNIT MIN. MAX. VCC DC supply voltage maximum speed performance 2.7 3.6 V low-voltage applications 1.2 3.6 V VI DC input voltage 0 5.5 V VO DC output voltage HIGH or LOW state 0 VCC V 3-state 0 5.5 V Tamb operating ambient temperature see DC and AC characteristics per device −40 +85 °C tr,tf (∆t/∆f) input rise and fall times VCC = 1.2 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC DC supply voltage −0.5 +6.5 V VI DC input voltage note 1 −0.5 +6.5 V IIK DC input diode current VI <0 −−50 mA IOK DC output diode current VO >VCC or VO < 0; note 1 −±50 mA VO DC output voltage HIGH or LOW state; note 1 −0.5 VCC + 0.5 V 3-state; note 1 −0.5 +6.5 V IO DC output source or sink current VO =0toVCC −±50 mA ICC,IGND DC VCC or GND current −±100 mA Tstg storage temperature −65 +150 °C PD power dissipation per package temperature range −40 to +85 °C; note 2 − 1000 mW |
同様の部品番号 - 74LVCH32373A |
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同様の説明 - 74LVCH32373A |
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