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LMX2531LQ1500E データシート(PDF) 4 Page - National Semiconductor (TI) |
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LMX2531LQ1500E データシート(HTML) 4 Page - National Semiconductor (TI) |
4 / 23 page Pin Descriptions (Continued) Pin # Pin Name I/O Description 19 GND - Ground for the VCO circuitry. 20 GND - Ground for the VCO Output Buffer circuitry. 21 Fout O Buffered RF Output for the VCO. 22 VccBUF - Power Supply for the VCO Buffer circuitry. Input may range from 2.8 - 3.2 V. Bypass capacitors should be placed as close as possible to this pin and ground. 23 Vtune I Tuning voltage input for the VCO. For connection to the CPout Pin through an external passive loop filter. 24 CPout O Charge pump output for PLL. For connection to Vtune through an external passive loop filter. 25 FLout O An open drain NMOS output which is used for FastLock or a general purpose output. 26 VregPLL1 - Internally regulated voltage for PLL charge pump. Not intended to drive an external load. Connect to ground with a capacitor. 27 VccPLL - Power Supply for the PLL. Input may range from 2.8 - 3.2 V. Bypass capacitors should be placed as close as possible to this pin and ground. 28 VregPLL2 - Internally regulated voltage for RF digital circuitry. Not intended to drive an external load. Connect to ground with a capacitor. 30 Ftest/LD O Multiplexed CMOS output. Typically used to monitor PLL lock condition. 31 OSCin I Oscillator input. 32 OSCin* I Oscillator complimentary input. When a single ended source is used, then a bypass capacitor should be placed as close as possible to this pin and be connected to ground. 33 Test O This pin if for test purposes and should be grounded for normal operation. 34 GND - Ground 36 VregDIG - Internally regulated voltage for LDO digital circuitry. www.national.com 4 |
同様の部品番号 - LMX2531LQ1500E |
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同様の説明 - LMX2531LQ1500E |
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