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CS5165A データシート(PDF) 11 Page - ON Semiconductor

部品番号 CS5165A
部品情報  5?묪it Synchronous CPU Buck Controller
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CS5165A データシート(HTML) 11 Page - ON Semiconductor

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CS5165A
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Figure 17. Output Voltage Transient Response to a 14
A Load Turn−Off, VOUT = +2.84 V (DAC = 10111)
Trace 1− GATE(H) (10 V/div.)
Trace 2− Inductor Switching Node (5.0 V/div.)
Trace 3− Load Current (5.0 A/div)
Trace 4− VOUT (100 mV/div.)
PROTECTION AND MONITORING FEATURES
Short Circuit Protection
A lossless hiccup mode short circuit protection feature is
provided, requiring only the Soft−Start capacitor to implement.
If a short circuit condition occurs the VFB low comparator sets
the FAULT latch. This causes the top FET to shut off,
disconnecting the regulator from it’s input voltage. The
Soft−Start capacitor is then slowly discharged by a 2.0
mA
current source until it reaches it’s lower 0.7 V threshold. The
regulator will then attempt to restart normally, operating in it’s
extended off time mode with a 50% duty cycle, while the
Soft−Start capacitor is charged with a 60
mA charge current.
If the short circuit condition persists, the regulator output
will not achieve the 1.0 V low VFB comparator threshold
before the Soft−Start capacitor is charged to it’s upper 2.5 V
threshold. If this happens the cycle will repeat itself until the
short is removed. The Soft−Start charge/discharge current
ratio sets the duty cycle for the pulses (2.0
mA/60 mA = 3.3%),
while actual duty cycle is half that due to the extended off time
mode (1.65%).
This protection feature results in less stress to the regulator
components, input power supply, and PC board traces than
occurs with constant current limit protection (see Figures 18
and 19).
If the short circuit condition is removed, output voltage will
rise above the 1.0 V level, preventing the FAULT latch from
being set, allowing normal operation to resume.
Figure 18. Demonstration Board Hiccup Mode Short
Circuit Protection. Gate Pulses are Delivered While
the Soft−Start Capacitor Charges, and Cease During
Discharge
M 25.0 ms
Trace 3− Soft−Start Timing Capacitor (1.0 V/div.)
Trace 4− 5.0 V Supply Voltage (2.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Figure 19. Demonstration Board Startup with
Regulator Output Shorted To Ground
M 50.0
ms
Trace 4− 5.0 V from PC Power Supply (2.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V2 control topology and requires no
additional external components. The control loop responds to
an overvoltage condition within 100 ns, causing the top
MOSFET to shut off, disconnecting the regulator from it’s
input voltage. The bottom MOSFET is then activated, resulting
in a “crowbar” action to clamp the output voltage and prevent
damage to the load (see Figures 20 and 21 ). The regulator will


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