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MC68340 データシート(PDF) 37 Page - Freescale Semiconductor, Inc

部品番号 MC68340
部品情報  Integrated Processor with DMA User?셲 Manual
Download  441 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 データシート(HTML) 37 Page - Freescale Semiconductor, Inc

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MOTOROLA
MC68340 USER’S MANUAL
2- 3
Table 2-1. Signal Index (Continued)
Signal Name
Mnemonic
Function
Input/
Output
Clock Mode Select/
Port B0
MODCK
Selects the source of the internal system clock upon reset
or becomes a parallel I/O port
In/I/O
Instruction Fetch/
Development Serial In
IFETCH/DSI
Indicates when the CPU32 is performing an instruction
word prefetch and when the instruction pipeline has been
flushed or provides background debug mode serial in
Out/In
Instruction Pipe/
Development Serial Out
IPIPE/DSO
Used to track movement of words through the instruction
pipeline or provides background debug mode serial out
Out/Out
Breakpoint/Development
Serial Clock
BKPT/DSCLK
Signals a hardware breakpoint to the CPU32 or provides
background debug mode serial clock
In/—
Freeze
FREEZE
Indicates that the CPU32 has entered background debug
mode
Out
Transmit Data
TxDA, TxDB
Transmitter serial data output from the serial module
Out
Clear-to-Send
CTSA, CTSB
Serial module clear-to-send inputs
In
Request-to-Send/
OP1, OP0
RTSB, RTSA
Channel request-to-send outputs or discrete outputs
Out/Out
Serial Crystal Oscillator
X1, X2
Connections for an external crystal to the serial module
internal oscillator circuit
Serial Clock
SCLK
External serial module clock input
In
Transmitter Ready/OP6
T
≈RDYA
Indicates transmit buffer has a character or becomes a
parallel output
Out/Out
Receiver Ready/
FIFO Full/OP4
R
≈RDYA
Indicates receive buffer has a character, the receiver
FIFO buffer is full or becomes a parallel output
Out/Out/Out
DMA Request
DRE
Q2, DREQ1
Input that starts a DMA process
In
DMA Acknowledge
DACK2,
DACK1
Output that signals an access during DMA
Out
DMA Done
DONE2,
DONE1
Bi-directional signal that indicates the last transfer
I/O
Timer Gate
TGATE2,
TGATE1
Counter enable input to timer
In
Timer Input
TIN2, TIN1
Time reference input to timer
In
Timer Output
TOUT2,
TOUT1
Output waveform from timer
Out
Test Clock
TCK
Provides a clock for IEEE 1149.1 test logic
In
Test Mode Select
TMS
Controls test mode operations
In
Test Data In
TDI
Shifts in instructions and test data
In
Test Data Out
TDO
Shifts out instructions and test data
Out
Synchronizer Power
VCCSYN
Quiet power supply to VCO; also used to control
synthesizer mode after reset.
System Power Supply
and Ground
VCC, GND
Power supply and ground to the MC68340
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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