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MC68340 データシート(PDF) 92 Page - Freescale Semiconductor, Inc

部品番号. MC68340
部品情報  Integrated Processor with DMA User’s Manual
ダウンロード  441 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
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MC68340 Datasheet(HTML) 92 Page - Freescale Semiconductor, Inc

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MOTOROLA
MC68340 USER’S MANUAL
3- 43
3.6.1 Bus Request
External devices capable of becoming bus masters request the bus by asserting
BR. This
signal can be wire-ORed to indicate to the MC68340 that some external device requires
control of the bus. The MC68340 is effectively at a lower bus priority level than the
external device and relinquishes the bus after it has completed the current bus cycle (if
one has started). If no
BGACK is received while the BR is active, the MC68340 remains
bus master once
BR is negated. This prevents unnecessary interference with ordinary
processing if the arbitration circuitry inadvertently responds to noise or if an external
device determines that it no longer requires use of the bus before it has been granted
mastership.
3.6.2 Bus Grant
The MC68340 supports operand coherency; thus, if an operand transfer requires multiple
bus cycles, the MC68340 does not release the bus until the entire transfer is complete.
Therefore, assertion of
BG is subject to the following constraints:
• The minimum time for
BG assertion after BR is asserted depends on internal
synchronization (see Section 11 Electrical Characteristics).
• During an external operand transfer, the MC68340 does not assert
BG until after
the last cycle of the transfer (determined by SIZx and
DSACK
≈).
• During an external operand transfer, the MC68340 does not assert
BG as long as
RMC is asserted.
• If the show cycle bits SHEN1–SHEN0 = 01, the MC68340 does not assert
BG to
an external master.
Externally, the
BG signal can be routed through a daisy-chained network or a priority-
encoded network. The MC68340 is not affected by the method of arbitration as long as the
protocol is obeyed.
3.6.3 Bus Grant Acknowledge
An external device cannot request and be granted the external bus while another device is
the active bus master. A device that asserts
BGACK remains the bus master until it
negates
BGACK. BGACK should not be negated until all required bus cycles are
completed. Bus mastership is terminated at the negation of
BGACK.
Once an external device receives the bus and asserts
BGACK, it should negate BR. If BR
remains asserted after
BGACK is asserted, the MC68340 assumes that another device is
requesting the bus and prepares to issue another
BG.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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