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MC68340 データシート(PDF) 20 Page - Freescale Semiconductor, Inc

部品番号 MC68340
部品情報  Integrated Processor with DMA User?셲 Manual
Download  441 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC68340 データシート(HTML) 20 Page - Freescale Semiconductor, Inc

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11/2/95
SECTION 1: OVERVIEW
UM Rev 1
MOTOROLA
MC68340 USER'S MANUAL
xix
LIST OF ILLUSTRATIONS (Continued)
Figure
Page
Number
Title
Number
6-1
DMA Block Diagram...............................................................................................6-1
6-2
Single-Address Transfers .....................................................................................6-3
6-3
Dual-Address Transfer...........................................................................................6-3
6-4
DMA External Connections to Serial Module....................................................6-6
6-5
Single-Address Read Timing (External Burst) ..................................................6-8
6-6
Single-Address Read Timing (Cycle Steal).......................................................6-9
6-7
Single-Address Write Timing (External Burst)...................................................6-10
6-8
Single-Address Write Timing (Cycle Steal).......................................................6-11
6-9
Dual-Address Read Timing (External Burst—Source Requesting)...............6-13
6-10
Dual-Address Read Timing (Cycle Steal—Source Requesting)...................6-14
6-11
Dual-Address Write Timing (External Burst—Destination Requesting)........6-16
6-12
Dual-Address Write Timing (Cycle Steal—Destination Requesting)............6-17
6-13
Fast Termination Option (Cycle Steal)................................................................6-21
6-14
Fast Termination Option (External Burst—Source Requesting) ....................6-22
6-15
DMA Module Programming Model......................................................................6-23
6-16
Packing and Unpacking of Operands.................................................................6-35
7-1
Simplified Block Diagram......................................................................................7-1
7-2
External and Internal Interface Signals ..............................................................7-5
7-3
Baud Rate Generator Block Diagram..................................................................7-8
7-4
Transmitter and Receiver Functional Diagram..................................................7-9
7-5
Transmitter Timing Diagram .................................................................................7-10
7-6
Receiver Timing Diagram......................................................................................7-12
7-7
Looping Modes Functional Diagram...................................................................7-15
7-8
Multidrop Mode Timing Diagram .........................................................................7-16
7-9
Serial Module Programming Model....................................................................7-19
7-10
Serial Module Programming Flowchart..............................................................7-41
8-1
Simplified Block Diagram......................................................................................8-1
8-2
Timer Functional Diagram.....................................................................................8-3
8-3
External and Internal Interface Signals ..............................................................8-5
8-4
Input Capture/Output Compare Mode.................................................................8-7
8-5
Square-Wave Generator Mode............................................................................8-8
8-6
Variable Duty-Cycle Square-Wave Generator Mode ......................................8-10
8-7
Variable-Width Single-Shot Pulse Generator Mode........................................8-11
8-8
Pulse-Width Measurement Mode ........................................................................8-12
8-9
Period Measurement Mode ..................................................................................8-14
8-10
Event Count Mode..................................................................................................8-15
8-11
Timer Module Programming Model.....................................................................8-18
9-1
Test Access Port Block Diagram..........................................................................9-2
9-2
TAP Controller State Machine..............................................................................9-3
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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