Rev. PrB_10/06

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INCREMENTAL ENCODER OUTPUTS

The incremental encoder emulation outputs A, B, and NM are

free running and are always valid, providing that valid resolver

format input signals are applied to the converter.

The AD2S1205 emulates a 1024-line encoder. Relating this to

converter resolution means one revolution produces 1,024 A, B

pulses. A leads B for increasing angular rotation (i.e., clockwise

direction). The addition of the DIR output negates the need for

external A and B direction decode logic. The DIR output

indicates the direction of the input rotation and it is high for

increasing angular rotation. DIR can be considered as an

asynchronous output and can make multiple changes in state

between two consecutive LSB update cycles. This occurs when

the direction of rotation of the input changes but the magnitude

of the rotation is less than 1 LSB.

The north marker pulse is generated as the absolute angular

position passes through zero. The north marker pulse width is

set internally for 90° and is defined relative to the A cycle.

Figure 9 details the relationship between A, B, and NM.

A

B

NM

Figure 9. A, B, and NM Timing for Clockwise Rotation

Unlike incremental encoders, the AD2S1205 encoder output is

not subject to error specifications such as cycle error, eccentric-

ity, pulse and state width errors, count density, and phase ϕ. The

maximum speed rating, n, of an encoder is calculated from its

lution (PPR).

PPR

f

n

MAX

×

=

60

The AD2S1205 A, B pulses are initiated from XTALOUT, which

has a frequency of 4.096 MHz. The equivalent encoder

switching frequency is

)

1

4

(

024

.

1

096

.

4

4

/

1

Pulse

Updates

MHz

MHz

=

=

×