74AUP2G80GT datasheet(11/18 Pages) PHILIPS

部品番号	74AUP2G80GT

部品情報	Low-power dual D-type flip-flop; positive-edge trigger

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11 / 18 page

74AUP2G80_1

Product data sheet

Rev. 01 — 25 August 2006

11 of 18

Philips Semiconductors

74AUP2G80

Low-power dual D-type ﬂip-ﬂop; positive-edge trigger

12. Waveforms

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.

Fig 7.

The clock input (nCP) to output (nQ) propagation delays

001aaf311

nCP input

nQ output

tPLH

tPHL

VM

VOH

VI

GND

nD input

VI

GND

VOL

VM

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.

Fig 8.

The clock input (nCP) to output (nQ) propagation delays, clock pulse width, nD to nCP setup and hold

times and the nCP maximum frequency

001aaf312

th

tsu(L)

th

tPLH

tW

tPHL

tsu(H)

1/fmax

VM

VI

GND

VI

GND

nCP input

nD input

VOH

VOL

nQ output

Table 9.

Measurement points

Supply voltage

Output

Input

VCC

VM

VI

tr = tf

0.8 V to 3.6 V

0.5

× V

CC

0.5

× V

CC

VCC

≤ 3.0 ns

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同様の説明 - 74AUP2G80GT

メーカー	部品番号	データシート	部品情報
NXP Semiconductors	74AUP2G80	95Kb / 18P	Low-power dual D-type flip-flop; positive-edge trigger Rev. 02-1 August 2007
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NXP Semiconductors	74AUP2G80	111Kb / 20P	Low-power dual D-type flip-flop; positive-edge trigger Rev. 04-2 June 2008
Nexperia B.V. All right...	74AUP2G79	279Kb / 19P	Low-power dual D-type flip-flop; positive-edge trigger Rev. 11 - 3 December 2020
Nexperia B.V. All right...	74AUP2G80	279Kb / 19P	Low-power dual D-type flip-flop; positive-edge trigger Rev. 11 - 7 December 2020
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	74AUP1G80	103Kb / 18P	Low-power D-type flip-flop; positive-edge trigger Rev. 01-20 October 2006
Nexperia B.V. All right...	74AUP1G79	305Kb / 21P	Low-power D-type flip-flop; positive-edge trigger Rev. 8 - 24 January 2022