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AD8117-EVAL データシート(PDF) 3 Page - Analog Devices |
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AD8117-EVAL データシート(HTML) 3 Page - Analog Devices |
3 / 32 page Preliminary Technical Data AD8117/AD8118 Rev. PrA | Page 3 of 32 AD8117 SPECIFICATIONS VS = ± 2.5 V at TA = 25°C, G = +1, RL = 100 Ω, Differential I/O mode, unless otherwise noted. Table 1. AD8117ABPZ Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB bandwidth 200 mV p-p, RL = 100 Ω >500 MHz 2 V p-p, RL = 100 Ω >420 MHz Gain flatness 0.1 dB, 200 mV p-p, RL = 100 Ω 100 MHz 0.1 dB, 2 V p-p, RL = 100 Ω 70 MHz Propagation delay 2 V p-p, RL =100 Ω 1.3 ns Settling time 1% , 2 V step, RL = 100 Ω 2.5 ns Slew rate 2 V Step, RL = 100 Ω, peak 1,800 V/µs 2 V Step, RL = 100 Ω, 10-90% 1,500 V/µs NOISE/DISTORTION PERFORMANCE Differential Gain Error NTSC or PAL, RL = 150 Ω or RL = 1kΩ 0.1 % Differential Phase Error NTSC or PAL, RL = 150 Ω or RL = 1kΩ 0.1 Degrees Crosstalk, all hostile ƒ = 5 MHz –75 dB ƒ = 10 MHz –70 dB ƒ = 100 MHz –50 dB ƒ = 500 MHz –40 dB Off isolation, input-output ƒ = 10 MHz, RL = 100 Ω, one channel −100 dB Input Voltage Noise 0.01 MHz to 50 MHz 45 nV/√Hz DC PERFORMANCE Gain Error RL = 100 Ω or 150 Ω 1 2 % Gain Matching No Load, Channel-Channel 0.5 1 % RL = 100 Ω, Channel-Channel 0.5 1 % OUTPUT CHARACTERISTICS Output impedance DC, Enabled 0.1 Ω Disabled, differential 30 kΩ Output disable capacitance Disabled 2 pF Output leakage current Disabled 1 µA Output voltage range No Load 2 V p-p INPUT CHARACTERISTICS Input offset voltage Differential 10 mV Input Voltage Range - Common Mode 4 V p-p Input Voltage Range - Differential Mode 2 V p-p Common-mode rejection ratio ƒ = 10 MHz –48 dB Input capacitance Any switch configuration 2 pF Input resistance Differential 5 kΩ Input bias current 3 µA SWITCHING CHARACTERISTICS Enable on time 50% update to 1% settling 200 ns Switching time, 2 V step 50% settling 20 ns Switching transient (glitch) Differential 40 mV p-p |
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