データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

SN74GTLPH1612DGGR データシート(PDF) 5 Page - Texas Instruments

部品番号 SN74GTLPH1612DGGR
部品情報  18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
Download  15 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

SN74GTLPH1612DGGR データシート(HTML) 5 Page - Texas Instruments

  SN74GTLPH1612DGGR Datasheet HTML 1Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 2Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 3Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 4Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 5Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 6Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 7Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 8Page - Texas Instruments SN74GTLPH1612DGGR Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 15 page
background image
www.ti.com
Absolute Maximum Ratings
(1)
SN74GTLPH1612
18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE
UNIVERSAL BUS TRANSCEIVER
SCES287D – OCTOBER 1999 – REVISED MAY 2005
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
4.6
V
BIAS VCC
A-port, ERC, and control inputs
–0.5
7
VI
Input voltage range(2)
V
B port and VREF
–0.5
4.6
A port
–0.5
7
Voltage range applied to any output in the
VO
V
high-impedance or power-off state(2)
B port
–0.5
4.6
A port
48
IO
Current into any output in the low state
mA
B port
200
IO
Current into any A-port output in the high state(3)
48
mA
Continuous current through each VCC or GND
±100
mA
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
θ
JA
Package thermal impedance(4)
55
°C/W
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
This current flows only when the output is in the high state and VO > VCC.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
5


同様の部品番号 - SN74GTLPH1612DGGR

メーカー部品番号データシート部品情報
logo
Texas Instruments
SN74GTLPH1616 TI1-SN74GTLPH1616 Datasheet
351Kb / 18P
[Old version datasheet]   17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
SN74GTLPH1616DGGR TI1-SN74GTLPH1616DGGR Datasheet
351Kb / 18P
[Old version datasheet]   17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
More results

同様の説明 - SN74GTLPH1612DGGR

メーカー部品番号データシート部品情報
logo
Texas Instruments
SN74GTLPH1655 TI-SN74GTLPH1655 Datasheet
173Kb / 16P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
SN74GTLPH1645 TI1-SN74GTLPH1645_15 Datasheet
1Mb / 22P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
logo
Fairchild Semiconductor
GTLP18T612 FAIRCHILD-GTLP18T612 Datasheet
74Kb / 9P
   18-Bit LVTTL/GTLP Universal Bus Transceiver
logo
Texas Instruments
SN74GTLPH16912 TI-SN74GTLPH16912 Datasheet
218Kb / 14P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SN74GTLPH16612 TI-SN74GTLPH16612 Datasheet
166Kb / 11P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SN74GTLPH16912 TI-SN74GTLPH16912_07 Datasheet
324Kb / 18P
[Old version datasheet]   18-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
SN74GTLPH3245 TI1-SN74GTLPH3245 Datasheet
435Kb / 19P
[Old version datasheet]   32-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SN74GTLPH1645 TI-SN74GTLPH1645 Datasheet
259Kb / 17P
[Old version datasheet]   16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SN74GTLPH1616 TI1-SN74GTLPH1616 Datasheet
351Kb / 18P
[Old version datasheet]   17-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS
SN74GTLPH32912 TI1-SN74GTLPH32912 Datasheet
388Kb / 17P
[Old version datasheet]   36-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


データシート ダウンロード

Go To PDF Page


リンク URL




プライバシーポリシー
ALLDATASHEET.JP
ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com