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SL2150F データシート(PDF) 3 Page - Zarlink Semiconductor Inc

部品番号 SL2150F
部品情報  Front End Power Splitter with AGC
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メーカー  ZARLINK [Zarlink Semiconductor Inc]
ホームページ  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

SL2150F データシート(HTML) 3 Page - Zarlink Semiconductor Inc

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Data Sheet
SL2150F
3
SEMICMF.019
2.0
Functional Description
The SL2150F is a broadband wide dynamic range power splitter with AGC and is optimized for application in multi
tuner cable set top box applications. It also has application in any system where a wide dynamic range broadband
power splitter is required.
The pin assignment is contained in Figure 2 and the block diagram in Figure 1. The port internal peripheral circuits
are contained in Figure 15 - "Port Peripheral Circuitry".
In normal application the RF input is interfaced to the device input. The input preamplifier is designed for low noise
figure, within the operating region of 50 to 860 MHz and for high intermodulation distortion intercept so offering good
signal to noise plus composite distortion spurious performance when loaded with a multi carrier system. The
preamplifier when combined with the input network shown in Figure 3 - "RF Input Matching Network" provides an
impedance match to a 75
Ω source. The typical impedance is shown in Figure 4 - "Typical Single-Ended RF Input
Impedance with Input Match".
The input NF and input referred two-tone intermodulation test condition spectrum are shown in Figure 5 - "Input NF
at 25 deg C" and Figure 6 - "Two Tone Intermodulation Test Condition Spectrum, Input Referred" respectively.
The output of the preamplifier is then power split to four independently controlled AGC stages.
Each AGC stage provides for a minimum of 30 dB of gain control across the input frequency range. The typical
AGC characteristic and NF versus gain setting are contained in Figure 7 - "Typical AGC versus Control Voltage
Characteristic" and Figure 8 - "Typical Variation in NF versus Gain Setting" respectively.
The input referred third order intercept point is independent of gain setting.
Finally, each of the AGC stages drive an output buffer of nominal differential output impedance of 440
Ω, which
provides a nominal 5.5 dB of conversion gain when terminated into a differential 75
Ω load.
In application it is important to avoid saturation of the output stage, therefore it is recommended that the output
standing current be sunk to Vcc through an inductor. A resistive pull up can also be used as shown in Figure 14 -
"Example Application Driving 200 Ohm Load with Resistive Pull Up", however the resistor values should not exceed
38 ohm single ended.
If an inductive current sink is used the maximum available gain from the device is circa 20 dB. This gain can be
reduced by application of an external load between the differential output ports. The gain can be approximately
calculated from the following formula:
GAIN = 20*log ((Parallel combination of 440 ohm and external load between ports) / 44 ohm) + 2dB
For example, when driving a 200 ohm load as in Figure 13 - "Example Application Driving 200 Ohm Load with
Inductive Pull Up", the gain equals
Gain
= 20 *log ((440 * 200)/(440+200)/44) +2dB
= 12dB.


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