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SN74AUP1G80 データシート(PDF) 2 Page - Texas Instruments

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部品番号 SN74AUP1G80
部品情報  LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

SN74AUP1G80 データシート(HTML) 2 Page - Texas Instruments

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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
D
CLK
Q
CLK
D
Q
SN74AUP1G80
LOW-POWER SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES593B – JULY 2004 – REVISED JULY 2005
This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time
requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock
triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the
hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar™ – WCSP (DSBGA)
SN74AUP1G80YEPR
0.23-mm Large Bump – YEP
Reel of 3000
_ _ _HX_
NanoFree™ – WCSP (DSBGA)
SN74AUP1G80YZPR
0.23-mm Large Bump – YZP (Pb-free)
–40
°C to 85°C
Reel of 3000
SN74AUP1G80DBVR
SOT (SOT-23) – DBV
H80_
Reel of 250
SN74AUP1G80DBVT
Reel of 3000
SN74AUP1G80DCKR
SOT (SC-70) – DCK
HX_
Reel of 250
SN74AUP1G80DCKT
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
⋅ = Pb-free).
FUNCTION TABLE
INPUTS
OUTPUT
Q
CLK
D
H
L
L
H
L or H
X
Q 0
LOGIC DIAGRAM (POSITIVE LOGIC)
2


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