MYSON
TECHNOLOGY
MTV212M64
(Rev. 1.2)
Revision 1.2
- 7 -
2000/07/04
P54E
= 1
→ pin “DA4/P5.4”is P5.4.
= 0
→ pin “DA4/P5.4”is DA4.
P53E
= 1
→ pin “DA3/P5.3”is P5.3.
= 0
→ pin “DA3/P5.3”is DA3.
P52E
= 1
→ pin “DA2/P5.2”is P5.2.
= 0
→ pin “DA2/P5.2”is DA2.
P51E
= 1
→ pin “DA1/P5.1”is P5.1.
= 0
→ pin “DA1/P5.1”is DA1.
P50E
= 1
→ pin “DA0/P5.0”is P5.0.
= 0
→ pin “DA0/P5.0”is DA0.
HIICE
= 1
→ pin “HSCL/P3.0/Rxd”is HSCL;
pin “HSDA/P3.1/Txd” is HSDA.
= 0
→ pin “HSCL/P3.0/Rxd”is P3.0/Rxd;
pin “HSDA/P3.1/Txd” is P3.1/Txd.
IIICE
= 1
→ pin “ISDA/P3.4/T0”is ISDA;
pin “ISCL/P3.5/T1” is ISCL.
= 0
→ pin “ISDA/P3.4/T0”is P3.4/T0;
pin “ISCL/P3.5/T1” is P3.5/T1.
HLFVE = 1
→ pin “DA9/HALFV”is VSYNC half frequency output.
= 0
→ pin “DA9/HALFV”is DA9.
HLFHE = 1
→ pin “DA8/HALFH”is HSYNC half frequency output.
= 0
→ pin “DA8/HALFH”is DA8.
HCLPE = 1
→ pin “DA7/HCLAMP”is HSYNC clamp pulse output.
= 0
→ pin “DA7/HCLAMP”is DA7.
P42E
= 1
→ pin “STOUT/P4.2”is P4.2.
= 0
→ pin “STOUT/P4.2”is STOUT.
P41E
= 1
→ pin “HBLANK/P4.1”is P4.1.
= 0
→ pin “HBLANK/P4.1”is HBLANK.
P40E
= 1
→ pin “VBLANK/P4.0”is P4.0.
= 0
→ pin “VBLANK/P4.0”is VBLANK.
OPTION (w) :
Chip option configuration (All are "0" in Chip Reset).
PWMF = 1
→ select 94KHz PWM frequency.
= 0
→ select 47KHz PWM frequency.
DIV253 = 1
→ PWM pulse width is 253 step resolution.
= 0
→ PWM pulse width is 256 step resolution.
FclkE
= 1
→ Double CPU clock freq.
IICpass = 1
→ HSCL/HSDA pin bypass to ISCL/ISDA pin in DDC2 mode.
= 0
→ Separate Master and Slave IIC block.
ENSCL = 1
→ Enable slave IIC block to hold HSCL pin low while MTV212M can't catch-up the
external master's speed.
Msel
= 1
→ Master IIC block connect to HSCL/HSDA pins.
= 0
→ Master IIC block connect to ISCL/ISDA pins.
MIICF1,MIICF0 = 1,1
→ select 400KHz Master IIC frequency.
= 1,0
→ select 200KHz Master IIC frequency.
= 0,1
→ select 50KHz Master IIC frequency.
= 0,0
→ select 100KHz Master IIC frequency.
SlvAbs1,SlvAbs0 : Slave IIC block A's slave address length.
= 1,0
→ 5-bits slave address.
= 0,1
→ 6-bits slave address.
= 0,0
→ 7-bits slave address.
XBANK (r/w) : Auxiliary RAM bank switch.
Xbnk[2:0]
= 0
→ Select AUXRAM bank 0.
= 1
→ Select AUXRAM bank 1.
= 2
→ Select AUXRAM bank 2.
= 3
→ Select AUXRAM bank 3.