© 2004 Fairchild Semiconductor Corporation

DS009533

www.fairchildsemi.com

April 1988

Revised January 2004

74F399

Quad 2-Port Register

General Description

The 74F399 is the logical equivalent of a quad 2-input mul-

tiplexer feeding into four edge-triggered flip-flops. A com-

mon Select input determines which of the two 4-bit words is

accepted. The selected data enters the flip-flops on the ris-

ing edge of the clock.

Features

s Select inputs from two data sources

s Fully positive edge-triggered operation

Ordering Code:

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

Unit Loading/Fan Out

Order Number

Package Number

Package Description

74F399SC

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74F399SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74F399PC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Pin Names

Description

U.L.

HIGH/LOW

S

Common Select Input

1.0/1.0

20

µA/−0.6 mA

CP

Clock Pulse Input (Active Rising Edge)

1.0/1.0

20

µA/−0.6 mA

Data Inputs from Source 0

1.0/1.0

20

µA/−0.6 mA

Data Inputs from Source 1

1.0/1.0

20

µA/−0.6 mA

Register True Outputs

50/33.3

−1 mA/20 mA