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74LVC132AD データシート(PDF) 4 Page - NXP Semiconductors |
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74LVC132AD データシート(HTML) 4 Page - NXP Semiconductors |
4 / 15 page 74LVC132A_1 © NXP B.V. 2006. All rights reserved. Product data sheet Rev. 01 — 15 December 2006 4 of 15 NXP Semiconductors 74LVC132A Quad 2-input NAND Schmitt trigger 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level. 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO14 packages: Ptot derates linearly with 8 mW/K above 70 °C. For TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 °C. 9. Recommended operating conditions Table 3. Function table[1] Input Output nA nB nY LLH LH H HL H HHL Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +6.5 V VI input voltage [1] −0.5 +6.5 V VO output voltage [1] −0.5 VCC + 0.5 V IIK input clamping current VI < 0 V −50 - mA IOK output clamping current VO > VCC or VO < 0 V - ±50 mA IO output current VO = 0 V to VCC - ±50 mA ICC supply current - 100 mA IGND ground current −100 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C [2] - 500 mW Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.2 - 3.6 V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 - +125 °C |
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同様の説明 - 74LVC132AD |
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