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CAT150041ZWI-GT3 データシート(PDF) 2 Page - Catalyst Semiconductor

部品番号 CAT150041ZWI-GT3
部品情報  Voltage Supervisor with 2-Kb and 4-Kb SPI Serial CMOS EEPROM
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メーカー  CATALYST [Catalyst Semiconductor]
ホームページ  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

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CAT15002, CAT15004
Doc. No. 1126 Rev. A
2
© 2007 Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
(1)
Parameters
Ratings
Units
Storage Temperature
-65 to +150
°C
Voltage on Any Pin with Respect to Ground
(2)
-0.5 to +6.5
V
RELIABILITY CHARACTERISTICS
(3)
Symbol Parameter
Min
Units
NEND
(4)
Endurance
1,000,000
Program/ Erase Cycles
TDR
Data Retention
100
Years
D.C. OPERATING CHARACTERISTICS
VCC = +2.5V to +5.5V unless otherwise specified.
Limits
Symbol Parameter
Min.
Typ.
Max.
Test Condition
Units
ICC
Supply Current
2
Read or Write at 10MHz, SO open
mA
12
25
VCC < 5.5V; VIN = VSS or VCC, CS
¯¯ = VCC
ISB
Standby Current
10
20
VCC < 3.6V; VIN = VSS or VCC, CS
¯¯ = VCC
μA
IL
I/O Pin Leakage
2
Pin at GND or VCC
μA
VIL
Input Low Voltage
-0.5
0.3 VCC
V
VIH
Input High Voltage
0.7 VCC
VCC + 0.5
V
VOL
Output Low Voltage
0.4
VCC ≥ 2.5V, IOL = 3.0mA
V
VOH
Output High Voltage
VCC - 0.8
VCC ≥ 2.5V, IOH = -1.6mA
V
Notes:
(1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this
specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
(2) The DC input voltage on any pin should not be lower than -0.5V or higher than VCC + 0.5V. During transitions, the voltage on any pin may
undershoot to no less than -1.5V or overshoot to no more than VCC + 1.5V, for periods of less than 20ns.
(3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100
and JEDEC test methods.
(4) Page Mode, VCC = 5V, 25°C
SO
EEPROM
SCK
SI
CS
WP
VCC
VOLTAGE
DETECTOR
RST or RST
VSS


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