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ST7FL19F1MCTRE データシート(PDF) 4 Page - STMicroelectronics |
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ST7FL19F1MCTRE データシート(HTML) 4 Page - STMicroelectronics |
4 / 138 page ST7L15, ST7L19 4/138 1 INTRODUCTION 1.1 DESCRIPTION The ST7L1x is a member of the ST7 microcontrol- ler family suitable for automotive applications. All ST7 devices are based on a common industry- standard 8-bit core, featuring an enhanced instruc- tion set. The ST7L1 features Flash memory with byte-by- byte In-Circuit Programming (ICP) and In-Applica- tion Programming (IAP) capability. Under software control, the ST7L1 device can be placed in WAIT, SLOW or HALT mode, reducing power consumption when the application is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. 1.2 PARAMETRIC DATA For easy reference, all parametric data is located in section 13 on page 98. 1.3 DEBUG MODULE The ST7L1 features an on-chip Debug Module (DM) to support In-Circuit Debugging (ICD). For a description of the DM registers, refer to the ST7 ICC Protocol Reference Manual. Figure 1. General Block Diagram *Note: Not available on ROM devices. 8-bit CORE ALU OSC1 OSC2 RESET PORT A INTERNAL CLOCK CONTROL RAM (256 bytes) PA7:0 (8 bits) VSS VDD POWER SUPPLY PROGRAM (up to 4 Kbytes) LVD MEMORY PLL x8 Ext. 1 MHz Int. 1 MHz 8-bit LITE TIMER 2 PORT B SPI PB6:0 (7 bits) DATA EEPROM (128 bytes) 1% RC OSC to 16 MHz ADC 12-bit AUTORELOAD TIMER 4 CLKIN / 2 or PLL x4* WATCHDOG DEBUG MODULE PORT C* PC1:0 (2 bits) 1 |
同様の部品番号 - ST7FL19F1MCTRE |
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同様の説明 - ST7FL19F1MCTRE |
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