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STA323W データシート(PDF) 10 Page - STMicroelectronics

部品番号 STA323W
部品情報  2.1 HIGH EFFICIENCY DIGITAL AUDIO SYSTEM
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STA323W データシート(HTML) 10 Page - STMicroelectronics

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6.4.1.1Current Address Multi-byte Read
The multi-byte read modes can start from any internal address. Sequential data bytes will be read from
sequential addresses within the STA323W. The master acknowledges each data byte read and then gen-
erates a STOP condition terminating the transfer.
6.4.2 Random Address Byte Read
Following the START condition the master sends a device select code with the RW bit set to 0. The
STA323W acknowledges this and then the master writes the internal address byte. After receiving, the
internal byte address the STA323W again responds with an acknowledgement. The master then initiates
another START condition and sends the device select code with the RW bit set to 1. The STA323W ac-
knowledges this and then responds by sending one byte of data. The master then terminates the transfer
by generating a STOP condition.
6.4.2.1Random Address Multi-byte Read
The multi-byte read modes could start from any internal address. Sequential data bytes will be read from
sequential addresses within the STA323W. The master acknowledges each data byte read and then gen-
erates a STOP condition terminating the transfer.
6.5 Write Mode Sequence
Figure 10. I2C Write Procedure
6.6 Read Mode Sequence
Figure 11. I2C Read Procedure
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DATA IN
ACK
STOP
BYTE
WRITE
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DATA IN
ACK
STOP
MULTIBYTE
WRITE
DATA IN
ACK
DEV-ADDR
ACK
START
RW
DATA
NO ACK
STOP
CURRENT
ADDRESS
READ
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DEV-ADDR
ACK
STOP
RANDOM
ADDRESS
READ
DATA
NO ACK
START
RW
DEV-ADDR
ACK
START
DATA
ACK
DATA
ACK
STOP
SEQUENTIAL
CURRENT
READ
DATA
NO ACK
DEV-ADDR
ACK
START
RW
SUB-ADDR
ACK
DEV-ADDR
ACK
SEQUENTIAL
RANDOM
READ
DATA
ACK
START
RW
DATA
ACK
NO ACK
STOP
DATA
RW=
HIGH


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