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MC10EL11MNR4G データシート(PDF) 1 Page - ON Semiconductor |
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MC10EL11MNR4G データシート(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2006 December, 2006− Rev. 9 1 Publication Order Number: MC10EL11/D MC10EL11, MC100EL11 5.0 VECL 1:2 Differential Fanout Buffer The MC10EL/100EL11 is a differential 1:2 fanout buffer. The device is functionally similar to the E111 device but with higher performance capabilities. The within-device skew and propagation delay is significantly improved over the E111. The differential inputs of the EL11 employ clamping circuitry to maintain stability under open input conditions. If the inputs are left open (pulled to VEE) the Q outputs will go LOW. The 100 Series contains temperature compensation. Features • 265 ps Propagation Delay • 5 ps Skew Between Outputs • PECL Mode Operating Range: VCC = 4.2 V to 5.7 with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V • Internal Input Pulldown Resistors • Pb−Free Packages are Available 1 2 3 4 5 6 7 8 D VEE VCC Figure 1. Logic Diagram and Pinout Assignment Q0 Q0 D Q1 Q1 D, D ECL Data Inputs Q0, Q0; Q1, Q1 ECL Data Outputs VCC Positive Supply VEE Negative Supply EP Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open. Table 1. PIN DESCRIPTION PIN FUNCTION *For additional marking information, refer to Application Note AND8002/D. MARKING DIAGRAMS* (Note: Microdot may be in either location) KL11 ALYWG G SOIC−8 D SUFFIX CASE 751 1 8 TSSOP−8 DT SUFFIX CASE 948R 1 8 1 8 See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION http://onsemi.com KEL11 ALYW G 1 8 L = Wafer Lot Y = Year W = Work Week M = Date Code G = Pb−Free Package H = MC10 K = MC100 4Q = MC10 2E = MC100 A = Assembly Location HEL11 ALYW G 1 8 HL11 ALYWG G 1 8 DFN8 MN SUFFIX CASE 506AA 14 14 |
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同様の説明 - MC10EL11MNR4G |
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