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74HCT244A データシート(PDF) 3 Page - ON Semiconductor

部品番号 74HCT244A
部品情報  Octal 3?뭆tate Noninverting Buffer/Line Driver/Line Receiver with LSTTL?묬ompatible Inputs
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

74HCT244A データシート(HTML) 3 Page - ON Semiconductor

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MC74HCT244A
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AC ELECTRICAL CHARACTERISTICS (VCC = 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
Guaranteed Limit
Unit
– 55 to 25
_C
v 85_C
v 125_C
tPLH,
tPHL
Maximum Propagation Delay, A to YA or B to YB
(Figures 1 and 3)
20
25
30
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
26
33
39
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to YA or YB
(Figures 2 and 4)
22
28
33
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
12
15
18
ns
Cin
Maximum Input Capacitance
10
10
10
pF
Cout
Maximum Three−State Output Capacitance
(Output in High−Impedance State)
15
15
15
pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
CPD
Power Dissipation Capacitance (Per Enabled Output)*
Typical @ 25
°C, VCC = 5.0 V
pF
55
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
SWITCHING WAVEFORMS
Figure 2.
Figure 3.
3 V
GND
tf
tr
INPUT
A OR B
OUTPUT
YA OR YB
0.3 V
1.3 V
2.7 V
10%
1.3 V
90%
tTLH
tPLH
tPHL
tTHL
ENABLE
A OR B
OUTPUT Y
OUTPUT Y
1.3 V
1.3 V
1.3 V
90%
10%
tPZL
tPLZ
tPZH
tPHZ
3 V
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE


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