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MC74VHCT574ADWRG データシート(PDF) 1 Page - ON Semiconductor

部品番号 MC74VHCT574ADWRG
部品情報  Octal D?뭈ype Flip?묯lop with 3?뭆tate Output
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC74VHCT574ADWRG データシート(HTML) 1 Page - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
January, 2006 − Rev. 4
1
Publication Order Number:
MC74VHCT574A/D
MC74VHCT574A
Octal D−Type Flip−Flop
with 3−State Output
The MC74VHCT574A is an advanced high speed CMOS octal
flip−flop with 3−state output fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
This 8−bit D−type flip−flop is controlled by a clock input and an
output enable input. When the output enable input is high, the eight
outputs are in a high impedance state.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V, because it
has full 5.0 V CMOS level output swings.
The VHCT574A input and output (when disabled) structures
provide protection when voltages between 0 V and 5.5 V are applied,
regardless of the supply voltage. These input and output structures
hel p prevent devi c e des t r uct i o n caus e d by suppl y
voltage−input/output voltage mismatch, battery backup, hot insertion,
etc.
Features
High Speed: fmax = 140 MHz (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5 V to 5.5 V Operating Range
Low Noise: VOLP = 1.6 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Chip Complexity: 286 FETs or 71.5 Equivalent Gates
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
20
1
TSSOP−20
SUFFIX DT
CASE 948E
SOIC−20WB
SUFFIX DW
CASE 751D
VHCT
574A
ALYW
G
G
1
1
20
1
VHCT574A
AWLYYWWG
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W
= Work Week
G or
G
= Pb−Free Package
(Note: Microdot may be in either location)
OE
CP
Q
L
L
L
H
L, H,
X
H
L
No Change
Z
INPUTS
OUTPUT
FUNCTION TABLE
D
H
L
X
X


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