MC100LVEL38DWG datasheet(3/7 Pages) ONSEMI

部品番号	MC100LVEL38DWG

部品情報	3.3V ECL 첨2, 첨4/6 Clock Generation Chip

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MC100LVEL38

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3

CLK

Q (÷2)

Q (÷4)

Q (÷6)

Phase_Out (÷4)

Phase_Out (÷6)

Figure 3. Timing Diagrams

Table 3. MAXIMUM RATINGS

Symbol

Parameter

Condition 1

Condition 2

Rating

Unit

VCC

PECL Mode Power Supply

VEE = 0 V

8 to 0

V

VEE

NECL Mode Power Supply

VCC = 0 V

−8 to 0

V

VI

PECL Mode Input Voltage

NECL Mode Input Voltage

VEE = 0 V

VCC = 0 V

VI VCC

VI VEE

6 to 0

−6 to 0

V

Iout

Output Current

Continuous

Surge

50

100

mA

IBB

VBB Sink/Source

± 0.5

mA

TA

Operating Temperature Range

−40 to +85

°C

Tstg

Storage Temperature Range

−65 to +150

°C

qJA

Thermal Resistance (Junction−to−Ambient)

0 lfpm

500 lfpm

SOIC−20

90

60

°C/W

qJC

Thermal Resistance (Junction−to−Case)

Standard Board

SOIC−20

30 to 35

°C/W

Tsol

Wave Solder

Pb

Pb−Free

<2 to 3 sec @ 248°C

<2 to 3 sec @ 260°C

265

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

同様の部品番号 - MC100LVEL38DWG

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ON Semiconductor	MC100LVEL38DWG	242Kb / 7P	3.3V ECL Clock Generation Chip July, 2016 ??Rev. 11

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