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MC100LVEP111FAR2 データシート(PDF) 2 Page - ON Semiconductor

部品番号 MC100LVEP111FAR2
部品情報  2.5V / 3.3V 1:10 Differential ECL/PECL/HSTL Clock Driver
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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MC100LVEP111
http://onsemi.com
2
VCC
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
12345678
24
23
22
21
20
19
18
17
16
Q9
Q9
Q8
Q8
Q7
Q7
VCC
VCC
Q0
Q0
Q1
Q1
Q2
Q2
VCC
VEE
VBB
VCC
Q6
Q6
Q5
Q5
Q4
Q4
Q3 Q3
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
Active Input
CLK0, CLK0
CLK1, CLK1
CLK_SEL
L
H
FUNCTION
ECL/PECL/HSTL CLK Input
ECL/PECL/HSTL CLK Input
ECL/PECL Outputs
ECL/PECL Active Clock Select Input
Reference Voltage Output
Positive Supply
Negative Supply
The exposed pad (EP) on the package
bottom must be attached to a heat−sink-
ing conduit. The exposed pad may only
be electrically connected to VEE.
PIN
CLK0*, CLK0**
CLK1*, CLK1**
Q0:9, Q0:9
CLK_SEL*
VBB
VCC
VEE
EP
Figure 1. LQFP−32 Pinout (Top View)
* Pins will default LOW when left open.
** Pins will default to VCC/2 when left open.
MC100LVEP111
Table 1. PIN DESCRIPTION
Table 2. FUNCTION TABLE
Figure 2. QFN−32 Pinout (Top View)
MC100LVEP111
VCC
CLK_SEL
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
Q9 Q9 Q8 Q8 Q7 Q7 VCC
VCC Q0 Q0 Q1 Q1 Q2 Q2 VCC
VEE
VBB
VCC
Q6
Q6
Q5
Q5
Q4
Q4
Q3
Q3
CLK0
CLK0
CLK1
CLK1
Exposed Pad (EP)


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