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MC14557BF データシート(PDF) 5 Page - ON Semiconductor

部品番号 MC14557BF
部品情報  1-to-64 Bit Variable Length Shift Register
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メーカー  ONSEMI [ON Semiconductor]
ホームページ  http://www.onsemi.com
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MC14557BF データシート(HTML) 5 Page - ON Semiconductor

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5
SWITCHING CHARACTERISTICS (Note 6) (CL = 50 pF, TA = 25°C)
Symbol
Characteristic
VDD
Min
Typ
(Note 7)
Max
Unit
tTLH,
tTHL
Rise and Fall Time, Q or Q Output
tTLH, tTHL = (1.5 ns/pF) CL + 25 ns
tTLH, tTHL = (0.75 ns/pF) CL + 12.5 ns
tTLH, tTHL = (0.55 ns/pF) CL + 9.5 ns
5
10
15
100
50
40
200
100
80
ns
tPLH,
tPHL
Propagation Delay, Clock or CE to Q or Q
tPLH, tPHL = (1.7 ns/pF) CL + 215 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 65 ns
5
10
15
300
130
90
600
260
180
ns
tPLH,
tPHL
Propagation Delay, Reset to Q or Q
tPLH, tPHL = (1.7 ns/pF) CL + 215 ns
tPLH, tPHL = (0.66 ns/pF) CL + 97 ns
tPLH, tPHL = (0.5 ns/pF) CL + 70 ns
5
10
15
300
130
95
600
260
190
ns
tWH(cl)
Pulse Width, Clock
5
10
15
200
100
75
95
45
35
ns
tWH(rst)
Pulse Width, Reset
5
10
15
300
140
100
150
70
50
ns
fcl
Clock Frequency (50% Duty Cycle)
5
10
15
3.0
7.5
13.0
1.7
5.0
6.7
MHz
tsu
Setup Time, A or B to Clock or CE
Worst case condition: L1 = L2 = L4 = L8 =
L16 = L32 = VSS (Register Length = 1)
5
10
15
700
290
145
350
130
85
ns
Best case condition: L32 = VDD, L1 through L16 =
Don’t Care (Any register length from 33 to 64)
5
10
15
400
165
60
45
5
0
th
Hold Time, Clock or CE to A or B
Best case condition: L1 = L2 = L4 = L8 = L16 =
L32 = VSS (Register Length = 1)
5
10
15
200
100
10
–150
–60
–50
ns
Worst case condition: L32 = VDD, L1 through L16 =
Don’t Care (Any register length from 33 to 64)
5
10
15
400
185
85
50
25
22
tr,
tf
Rise and Fall Time, Clock
5
10
15
No Limit
tr,
tf
Rise and Fall Time, Reset or CE
5
10
15
15
5
4
ms
trem
Removal Time, Reset to Clock or CE
5
10
15
160
80
70
80
40
35
ns
6. The formulas given are for the typical characteristics only at 25
°C.
7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.


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