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NBSG11BAEVB データシート(PDF) 3 Page - ON Semiconductor |
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NBSG11BAEVB データシート(HTML) 3 Page - ON Semiconductor |
3 / 12 page NBSG11 http://onsemi.com 3 50 W 50 W VTCLK CLK CLK VTCLK VEE VCC Figure 3. Logic Diagram 75 K W 75 K W 36.5 K W Q1 Q1 Q0 Q0 Table 2. INTERFACING OPTIONS INTERFACING OPTIONS CONNECTIONS CML Connect VTCLK and VTCLK to VCC LVDS Connect VTCLK and VTCLK together AC−COUPLED Bias VTCLK and VTCLK Inputs within (VIHCMR) Common Mode Range RSECL, PECL, NECL Standard ECL Termination Techniques LVTTL, LVCMOS An external voltage should be be applied to the unused complementary differential input. Nominal voltage is 1.5 V for LVTTL and VCC/2 for LVCMOS inputs. Table 3. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor (CLK, CLK) 75 k W Internal Input Pullup Resistor (CLK) 36.5 k W ESD Protection Human Body Model Machine Model > 2 kV > 100 V Moisture Sensitivity (Note 4) Pb Pkg Pb−Free Pkg FCBGA−16 QFN−16 Level 3 Level 1 N/A Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 125 Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 4. For additional information, see Application Note AND8003/D. |
同様の部品番号 - NBSG11BAEVB |
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同様の説明 - NBSG11BAEVB |
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