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ATTINY2313-20MU データシート(PDF) 66 Page - ATMEL Corporation |
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ATTINY2313-20MU データシート(HTML) 66 Page - ATMEL Corporation |
66 / 231 page 66 ATtiny2313/V 2543I–AVR–04/06 8-bit Timer/Counter0 with PWM Timer/Counter0 is a general purpose 8-bit Timer/Counter module, with two independent Output Compare Units, and with PWM support. It allows accurate program execution timing (event management) and wave generation. The main features are: • Two Independent Output Compare Units • Double Buffered Output Compare Registers • Clear Timer on Compare Match (Auto Reload) • Glitch Free, Phase Correct Pulse Width Modulator (PWM) • Variable PWM Period • Frequency Generator • Three Independent Interrupt Sources (TOV0, OCF0A, and OCF0B) Overview A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 27. For the actual placement of I/O pins, refer to “Pinout ATtiny2313” on page 2. CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the “8-bit Timer/Counter Register Description” on page 77. Figure 27. 8-bit Timer/Counter Block Diagram Registers The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all vis- ible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure. The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on the T0 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source is selected. The output from the Clock Select logic is referred to as the timer clock (clk T0). The double buffered Output Compare Registers (OCR0A and OCR0B) is compared with the Timer/Counter value at all times. The result of the compare can be used by the Waveform Generator to generate a PWM or variable frequency output on the Output Clock Select Timer/Counter OCRnA OCRnB = = TCNTn Waveform Generation Waveform Generation OCFnA OCFnB = Fixed TOP Value Control Logic = 0 TOP BOTTOM Count Clear Direction TOVn (Int.Req.) OCFnA (Int.Req.) OCFnB (Int.Req.) TCCRnA TCCRnB Tn Edge Detector ( From Prescaler ) clk Tn |
同様の部品番号 - ATTINY2313-20MU |
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同様の説明 - ATTINY2313-20MU |
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