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AM29SL800DB90WCF データシート(PDF) 3 Page - Advanced Micro Devices

部品番号 AM29SL800DB90WCF
部品情報  8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory
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メーカー  AMD [Advanced Micro Devices]
ホームページ  http://www.amd.com
Logo AMD - Advanced Micro Devices

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DATA SHEET
This Data Sheet states AMD’s current specifications regarding the Products described herein. This Data Sheet may
be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# 27546
Rev: A Amendment/6
Issue Date: January 23, 2007
Am29SL800D
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 1.8 Volt-only Super Low Voltage Flash Memory
DISTINCTIVE CHARACTERISTICS
Single Power Supply Operation
— 1.65 to 2.2 V for read, program, and erase
operations
— Ideal for battery-powered applications
Manufactured on 0.23 µm Process Technology
— Compatible with 0.32 µm Am29SL800C device
High Performance
— Access times as fast as 90 ns
Ultra Low Power Consumption (Typical Values at
5 MHz)
— 0.2 µA Automatic Sleep Mode current
— 0.2 µA standby mode current
— 5 mA read current
— 15 mA program/erase current
Flexible Sector Architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
fifteen 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
fifteen 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection Features:
A hardware method of locking a sector to prevent any
program or erase operations within that sector
Sectors can be locked in-system or via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Top or Bottom Boot Block Configurations
Available
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
Minimum 1,000,000 Erase Cycle Guarantee Per
Sector
20-Year Data Retention at 125
°C
Package Option
— 48-pin TSOP
— 48-ball FBGA
Compatibility with JEDEC Standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
Data# Polling and Toggle Bits
— Provides a software method of detecting program
or erase operation completion
Ready/Busy# Pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
Hardware Reset Pin (RESET#)
— Hardware method to reset the device to reading
array data


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