AM75PDL191CHHA datasheet(10/129 Pages) SPANSION

部品番号	AM75PDL191CHHA

部品情報	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory

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Am75PDL191CHHa/Am75PDL193CHHa

January 14, 2004

ADV ANCE

I N FO RMAT I O N

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . 11

MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . 12

Connection Diagram–PDL127 . . . . . . . . . . . . . . . 13

Special Package Handling Instructions .................................. 13

Connection Diagram–PDL129 . . . . . . . . . . . . . . . 14

Special Package Handling Instructions .................................. 14

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Ordering Information . . . . . . . . . . . . . . . . . . . . . . 16

Am29PDL127H/AM29PDL129H Device Bus Operations ....... 17

Table 1. Device Bus Operations ..................................................... 18

Requirements for Reading Array Data ................................... 19

Random Read (Non-Page Read) ........................................ 19

Page Mode Read ................................................................ 19

Table 2. Page Select .......................................................................19

Simultaneous Operation ......................................................... 19

Table 3. Bank Select (PDL129H) ....................................................19

Table 4. Bank Select (PDL127H) ....................................................19

Writing Commands/Command Sequences ............................ 20

Accelerated Program Operation .......................................... 20

Autoselect Functions ........................................................... 20

Standby Mode ........................................................................ 20

Automatic Sleep Mode ........................................................... 20

RESET#: Hardware Reset Pin ............................................... 21

Output Disable Mode .............................................................. 21

Table 5. SecSi

TM Sector Addresses ................................................21

Table 6. Am29PDL127H Sector Architecture ..................................22

Table 7. Am29PDL129H Sector Architecture ..................................29

Table 8. Am29PDL127H Boot Sector/Sector Block Addresses for Pro-

tection/Unprotection ........................................................................37

Table 9. Am29PDL129H Boot Sector/Sector Block Addresses for Pro-

tection/Unprotection

CE#f1 Control ..................................................................................38

Table 10. Am29PDL129H Boot Sector/Sector Block Addresses for

Protection/Unprotection

CE#f2 Control ..................................................................................38

Sector Protection . . . . . . . . . . . . . . . . . . . . . . . . . 39

Persistent Sector Protection ................................................... 39

Persistent Protection Bit (PPB) ............................................ 39

Persistent Protection Bit Lock (PPB Lock) .......................... 39

Dynamic Protection Bit (DYB) ............................................. 39

Table 11. Sector Protection Schemes .............................................40

Persistent Sector Protection Mode Locking Bit ................... 40

Password Protection Mode ..................................................... 40

Password and Password Mode Locking Bit ........................ 41

64-bit Password ................................................................... 41

Write Protect (WP#) ................................................................ 41

Persistent Protection Bit Lock .............................................. 41

High Voltage Sector Protection .............................................. 42

Figure 1. In-System Sector Protection/

Sector Unprotection Algorithms ...................................................... 43

Temporary Sector Unprotect .................................................. 44

Figure 2. Temporary Sector Unprotect Operation........................... 44

SecSi™ (Secured Silicon) Sector

Flash Memory Region ............................................................ 44

Factory-Locked Area (64 words) ......................................... 44

Customer-Lockable Area (64 words) ................................... 44

Figure 3. PDL127H SecSi Sector Protection Algorithm .................. 45

SecSi Sector Protection Bits ................................................ 46

Hardware Data Protection ...................................................... 46

Low VCC Write Inhibit ......................................................... 46

Write Pulse “Glitch” Protection ............................................ 46

Logical Inhibit ....................................................................... 46

Power-Up Write Inhibit ......................................................... 46

Common Flash Memory Interface (CFI) . . . . . . . 46

Table 12. CFI Query Identification String ........................................ 47

System Interface String................................................................... 47

Table 14. Device Geometry Definition ............................................ 48

Table 15. Primary Vendor-Specific Extended Query ...................... 49

Command Definitions . . . . . . . . . . . . . . . . . . . . . 50

Reading Array Data ................................................................ 50

Reset Command ..................................................................... 50

Autoselect Command Sequence ............................................ 50

Enter SecSi™ Sector/Exit SecSi Sector

Command Sequence .............................................................. 51

Word Program Command Sequence ...................................... 51

Unlock Bypass Command Sequence .................................. 51

Figure 4. Program Operation ......................................................... 52

Chip Erase Command Sequence ........................................... 52

Sector Erase Command Sequence ........................................ 52

Figure 5. Erase Operation.............................................................. 53

Erase Suspend/Erase Resume Commands ........................... 53

Password Program Command ................................................ 53

Password Verify Command .................................................... 54

Password Protection Mode Locking Bit Program Command .. 54

Persistent Sector Protection Mode Locking Bit Program Com-

mand ....................................................................................... 54

SecSi Sector Protection Bit Program Command .................... 54

PPB Lock Bit Set Command ................................................... 54

DYB Write Command ............................................................. 54

Password Unlock Command .................................................. 55

PPB Program Command ........................................................ 55

All PPB Erase Command ........................................................ 55

DYB Write Command ............................................................. 55

PPB Lock Bit Set Command ................................................... 55

PPB Status Command ............................................................ 55

PPB Lock Bit Status Command .............................................. 55

Sector Protection Status Command ....................................... 55

Command Definitions Tables .................................................. 56

Table 16. Memory Array Command Definitions ............................. 56

Table 17. Sector Protection Command Definitions ........................ 57

Write Operation Status . . . . . . . . . . . . . . . . . . . . 58

DQ7: Data# Polling ................................................................. 58

Figure 6. Data# Polling Algorithm .................................................. 58

RY/BY#: Ready/Busy# ............................................................ 59

DQ6: Toggle Bit I .................................................................... 59

Figure 7. Toggle Bit Algorithm........................................................ 59

DQ2: Toggle Bit II ................................................................... 60

Reading Toggle Bits DQ6/DQ2 ............................................... 60

DQ5: Exceeded Timing Limits ................................................ 60

DQ3: Sector Erase Timer ....................................................... 60

Table 18. Write Operation Status ................................................... 61

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 62

Figure 8. Maximum Negative Overshoot Waveform ...................... 62

Figure 9. Maximum Positive Overshoot Waveform........................ 62

同様の部品番号 - AM75PDL191CHHA

メーカー	部品番号	データシート	部品情報
SPANSION	AM75PDL191CHH	2Mb / 136P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
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	AM75PDL191CHH_0402	2Mb / 136P	128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory

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