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ISL5416 データシート(PDF) 1 Page - Intersil Corporation |
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ISL5416 データシート(HTML) 1 Page - Intersil Corporation |
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1 / 71 page  1 ® FN6006.3 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002-2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL5416 Four-Channel Wideband Programmable DownConverter The ISL5416 Four-Channel Wideband Programmable Digital DownConverter (WPDC) is designed for high dynamic range applications such as cellular basestations where the processing of multiple channels is required in a small physical space. The WPDC combines four channels in a single package, each including: an NCO, a digital mixer, digital filters, an AGC and a resampling filter. All channels are independently programmable and may be updated in real time. Each of the four channels can select any of the four digital input buses. Each of the tuners can process a W-CDMA channel. Channels may be cascaded or polyphased for increased bandwidth. Selectable outputs include I samples, Q samples, and AGC gain. Outputs from the part are available over the parallel, serial or uP interfaces. Features • Up to 95MSPS Input • Four Parallel 16-bit Fixed or 17-bit Floating Point Inputs • Programmable RF Attenuator/VGA Control • 32-Bit Programmable Carrier NCO with > 110dB SFDR • 20-bit Internal Data Path • Filter Functions - Multi-Stage Cascaded-Integrator-Comb (CIC) Filter - Two programmable FIR Filters (first up to 32-taps, second up to 64-taps) - Half Band Interpolation Filter - Resampling FIR Filter • Overall decimation from 1 to >4096 • Digital AGC with up to 96dB of Gain Range • Up to Four Independent 16-bit Parallel Outputs • Serial Output Option • 16-bit Parallel µP Interface • 1.8V core, 3.3V I/O Operation • Evaluation Board and Configuration Software available • Pb-free available Applications • Basestation Receivers: GSM/EDGE, CDMA2000, UMTS. Block Diagram Ordering Information PART NUMBER TEMP RANGE (oC) PACKAGE PKG. DWG. # ISL5416KI -40 to 85 256 BGA V256.17x17 ISL5416KIZ (See Note) -40 to 85 256 BGA (Pb-free) V256.17x17 ISL5416EVAL1 25 EVALUATION KIT NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. INPUT SELECT CLOCK & FORMAT NCO MIXER CIC FIR1 FILTER FIR2 FILTER AGC IHBF RESAMPLER AOUT(15:8) AOUT(7:0) FSYNCA OEA TEST REGISTER AIN(16:0) ENIA CLKA INPUT A CHANNEL O OUTPUT I Q I Q I Q I Q I Q I Q INPUT D INPUT C INPUT B CHANNEL 2 CHANNEL 1 CHANNEL 3 RF ATTENUATOR VGA CONTROL EOUT(15:0) CLKO1 CLKO2 /INTRPT JTAG SYNCHRONIZATION µP INTERFACE SYNCO SYNCIN1 SYNCIN2 RESET Data Sheet August 2004 |
同様の部品番号 - ISL5416_04 |
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同様の説明 - ISL5416_04 |
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