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SN74ALVC7814-25DL データシート(PDF) 1 Page - Texas Instruments |
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SN74ALVC7814-25DL データシート(HTML) 1 Page - Texas Instruments |
1 / 13 page SN74ALVC7814 64 × 18 LOW-POWER FIRST-IN, FIRST-OUT MEMORY SCAS592A – OCTOBER 1997 – REVISED APRIL 1998 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Member of the Texas Instruments Widebus ™ Family D Low-Power Advanced CMOS Technology D Operates From 3-V to 3.6-V VCC D Load Clock and Unload Clock Can Be Asynchronous or Coincident D Full, Empty, and Half-Full Flags D Programmable Almost-Full/Almost-Empty Flag D Fast Access Times of 18 ns With a 50-pF Load and All Data Outputs Switching Simultaneously D Data Rates up to 40 MHz D 3-State Outputs D Pin-to-Pin Compatible With SN74ACT7804, SN74ACT7806, and SN74ACT7814 D Packaged in Shrink Small-Outline 300-mil Package Using 25-mil Center-to-Center Spacing description A FIFO memory is a storage device that allows data to be written into and read from its array at independent data rates. The SN74ALVC7814 is an 18-bit FIFO with high speed and fast access times. Data is processed at rates up to 40 MHz with access times of 18 ns in a bit-parallel format. These memories are designed for 3-V to 3.6-V VCC operation. Data is written into memory on a low-to-high transition of the load clock (LDCK) and is read out on a low-to-high transition of the unload clock (UNCK). The memory is full when the number of words clocked in exceeds the number of words clocked out by 64. When the memory is full, LDCK has no effect on the data residing in memory. When the memory is empty, UNCK has no effect. Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost- full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output is high whenever the FIFO contains 32 or more words and low when it contains 31 or fewer words. The AF/AE status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN) is low. The AF/AE flag is high when the FIFO contains X or fewer words or (64 – Y) or more words. The AF/AE flag is low when the FIFO contains between (X + 1) and (63 – Y) words. Copyright © 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Widebus is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 RESET D17 D16 D15 D14 D13 D12 D11 D10 VCC D9 D8 GND D7 D6 D5 D4 D3 D2 D1 D0 HF PEN AF/AE LDCK NC NC FULL OE Q17 Q16 Q15 GND Q14 VCC Q13 Q12 Q11 Q10 Q9 GND Q8 Q7 Q6 Q5 VCC Q4 Q3 Q2 GND Q1 Q0 UNCK NC NC EMPTY DL PACKAGE (TOP VIEW) NC – No internal connection |
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同様の説明 - SN74ALVC7814-25DL |
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