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AD9910 データシート(PDF) 4 Page - Analog Devices |
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AD9910 データシート(HTML) 4 Page - Analog Devices |
4 / 60 page AD9910 Rev. 0 | Page 4 of 60 GENERAL DESCRIPTION The AD9910 is a direct digital synthesizer (DDS) featuring an integrated 14-bit DAC and supporting sample rates up to 1 GSPS. The AD9910 employs an advanced, proprietary DDS technology that provides a significant reduction in power con- sumption without sacrificing performance. The DDS/DAC combination forms a digitally programmable, high frequency, analog output synthesizer capable of generating a frequency agile sinusoidal waveform at frequencies up to 400 MHz. The user has access to the three signal control parameters that control the DDS: frequency, phase, and amplitude. The DDS provides fast frequency hopping and frequency tuning resolu- tion with its 32-bit accumulator. With a 1 GSPS sample rate, the tuning resolution is ~0.23 Hz. The DDS also enables fast phase and amplitude switching capability. The AD9910 is controlled by programming its internal control registers via a serial I/O port. The AD9910 includes an integrated static RAM to support various combinations of frequency, phase, and/or amplitude modulation. The AD9910 also supports a user defined, digitally controlled, digital ramp mode of operation. In this mode, the frequency, phase, or amplitude can be varied linearly over time. For more advanced modulation functions, a high speed parallel data input port is included to enable direct frequency, phase, amplitude, or polar modulation. The AD9910 is specified to operate over the extended industrial temperature range (see the Absolute Maximum Ratings section for details). 16 PARALLEL INPUT PDCLK SCLK SDIO I/O_RESET PROFILE I/O_UPDATE RAM POWER DOWN CONTROL DAC_RSET IOUT IOUT CS TxENABLE DAC FSC OSK RAM_SWP_OVR A θ INVERSE SINC FILTER CLOCK AMPLITUDE (A) FREQUENCY (ω) PHASE (θ) DIGITAL RAMP GENERATOR 8 DAC FSC 8 2 DRCTL DRHOLD DROVER 2 MULTICHIP SYNCHRONIZATION SYSCLK PLL ÷2 REF_CLK REF_CLK REFCLK_OUT XTAL_SEL PARALLEL DATA TIMING AND CONTROL 2 AD9910 PROGRAMMING REGISTERS OUTPUT SHIFT KEYING DATA ROUTE AND PARTITION CONTROL 3 INTERNAL CLOCK TIMING AND CONTROL ω Acos (ωt+θ) Asin (ωt+θ) 2 2 DAC 14-BIT DDS AUX DAC 8-BIT Figure 2. Detailed Block Diagram |
同様の部品番号 - AD9910 |
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同様の説明 - AD9910 |
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