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AD9889BBSTZ-80 データシート(PDF) 1 Page - Analog Devices

部品番号 AD9889BBSTZ-80
部品情報  High Performance HDMI/DVI Transmitter
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

AD9889BBSTZ-80 データシート(HTML) 1 Page - Analog Devices

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High Performance
HDMI/DVI Transmitter
AD9889B
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
FEATURES
General
HDMI/DVI transmitter compatible with HDMI v. 1.3,
DVI v. 1.0, and HDCP v. 1.2
Single 1.8 V power supply
Video/audio inputs accept logic levels from 1.8 V to 3.3 V
80-lead LQFP, Pb-free package
64-lead LFCSP, Pb-free package
76-ball CSP_BGA, Pb-free package
Digital video
165 MHz operation supports all resolutions from 480i to
1080p and UXGA at 60 Hz
Programmable two-way color space converter
Supports RGB, YCbCr, and DDR
Supports ITU656-based embedded syncs
Automatic input video format timing detection (CEA-861B)
Digital audio
Supports standard S/PDIF for stereo LPCM or compressed
audio up to 192 kHz
8-channel, uncompressed, LPCM I2S audio up to 192 kHz
Special features for easy system design
On-chip MPU with I2C® master to perform HDCP
operations and EDID reading operations
5 V tolerant I2C and HPD I/Os, no extra device needed
No audio master clock needed for supporting S/PDIF
and I2S
On-chip MPU reports HDMI events through interrupts and
registers
APPLICATIONS
DVD players and recorders
Digital set-top boxes
A/V receivers
Digital cameras and camcorders
HDMI repeater/splitter
GENERAL DESCRIPTION
The AD9889B is a 165 MHz, high definition multimedia inter-
face (HDMI) v. 1.3 transmitter. It supports HDTV formats up to
1080p, and computer graphic resolutions up to UXGA (1600 ×
1200 @ 60 Hz). With the inclusion of HDCP, the AD9889B allows
the secure transmission of protected content as specified by the
HDCP v. 1.2 protocol.
FUNCTIONAL BLOCK DIAGRAM
SDA
SCL
DDCSDA
DDCSCL
HPD
INT
INTERRUPT
HANDLER
HDCP-EDID
MICRO-
CONTROLLER
HDCP
CORE
I2C
MASTER
I2C
SLAVE
REGISTER
CONFIGURATION
LOGIC
HDMI
Tx
CORE
XOR
MASK
COLOR
SPACE
CONVER-
SION
4:2:2 TO
4:4:4
CONVER-
SION
VIDEO
DATA
CAPTURE
AUDIO
DATA
CAPTURE
Tx0–/Tx0+
Tx1–/Tx1+
Tx2–/Tx2+
TxC–/TxC+
CLK
VSYNC
HSYNC
DE
D[23:0]
S/PDIF
MCLK
I2S[3:0]
LRCLK
SCLK
MDA
MCL
AD9889B
Figure 1.
The AD9889B supports both S/PDIF and 8-channel I2S audio.
Its high fidelity, 8-channel I2S can transmit either stereo or 7.1
surround audio at 192 kHz. The S/PDIF can carry stereo LPCM
audio or compressed audio, including DTS®, THX®, and Dolby®
Digital.
The AD9889B helps reduce system design complexity and cost
by incorporating such features as an internal MPU for HDCP
operations, an I2C master for EDID reading, a single 1.8 V power
supply, and 5 V tolerance on the I2C and hot plug detect pins.
Fabricated in an advanced CMOS process, the AD9889B is
available in a space-saving, 76-ball CSP_BGA or 64-lead LFCSP
surface-mount package, and an 80-lead LQFP surface-mount
package. All packages are available as Pb-free and are specified
from −25°C to +85°C.


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