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CDCE401 データシート(PDF) 4 Page - Texas Instruments

部品番号 CDCE401
部品情報  OSCILLATOR IC WITH ELECTRONIC CALIBRATION
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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CDCE401 データシート(HTML) 4 Page - Texas Instruments

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DETAILED DESCRIPTION
CONTROL PIN EN: Enable
SINGLE-PIN INTERFACE CONTROL COMMANDS
T0130-01
VDD
EnterProgramming
SequenceandWrite
Word0(TrimPPM)
EN/SDATA
Apply Application
VDDandVerify
Settings(Measure)
Perform
StateJump
Into
Program
EEPROM
HoldforMinimum
10msto Achieve
SafeProgramming
JumpFrom
State3
State1
®
BackIntoNormal
Application After
200- sLow
m
2.25V
VDD
3.3V
£
£
3.1V
VDD
3.3V
£
£
3.1V
VDD
3.3V
£
£
2.25V
VDD
3.3V
£
£
CDCE401
SCAS820 – JUNE 2006
The functions of the EN control pin are listed and explained in Table 2.
Table 2. EN Control Pin Functions
EN
FUNCTION
0
Disabled: all current sources are switched off, output is in the high-impedance state.
1
Enabled: output follows the XIN/XOUT oscillation.
The CDCE401 can be configured and programmed via the SDATA input pin. For this purpose, a
pulse-code-shaped signal must be applied to the device as shown in the waveforms of Figure 1 to select one of
the operation modes described in the State Flow-Diagram of the Single-Pin Interface section. During the
EEPROM programming phase, the device requires a stable VDD of 3.2 V ±100 mV for secure writing of the
EEPROM cells. After each Write-to-WordX, the written data is latched, made effective, and offers look-ahead
before the actual data is stored into the EEPROM.
Table 3 summarizes all valid programming commands.
Figure 1. Typical Programming Cycle
Table 3. Single-Pin Interface Control Commands
SDATA
FUNCTION
00 1100
Enter register programming mode (state 1
→ state 2); bits must be sent in the specified order with the specified
timing. Otherwise, a time-out occurs.
11 1011
Enter register read-back mode; bits must be sent in the specified order with the specified timing. Otherwise a
time-out occurs.
00 xxxx xxxx
Write-to-word0 (state 2) (1)(2)(3)
10 xxxx xxxx
Write-to-word1 (state 2) (1) (2) (3)
01 xxxx xxxx
Write-to-word2 (state 2) (1) (2) (3)
11 xxxx xxxx
State-machine jump: All other patterns not defined as follows cause exit to normal mode.
11 1111 1111
Jump: Exit write-to-RAM (state 2
→ state 1)
11 1111 0000
Jump: Enter EEPROM programming without an EEPROM lock (state 2
→ state 3)
11 0101 0101
Jump: Enter EEPROM programming with EEPROM lock (state 2
→ state 4)
11 0000 0000
Jump: Exit EEPROM programming (state 3 or state 4
→ state 1)
(1)
Each rising edge causes a bit to be latched.
(2)
Between the bits, some longer time delays can occur, but this has no effect on the data.
(3)
A Write-to-WordX is expected to be 10 bits long. After the 10th bit, the respective word is latched, and its effect can be observed as
look-ahead function.
4
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