1999 Nov 05

9

Philips Semiconductors

Product specification

QPSK transmitter

TDA8050A

Notes

1. All specification points of the output section and the overall circuit are measured after the 2 : 1 transformer (Siemens

V944) loaded with 75

Ω.

2. Overall phase noise:

c) DAC = 28.

d) f = 65 MHz.

3. The crystal oscillator uses a 4, 2 or 1 MHz crystal in series with a capacitor. The crystal is serial resonant with a load

Crystal oscillator

crystal frequency

note 3

1

−

4

MHz

input impedance

600

1200

−Ω

DC input level

−

2.9

−

V

Modulator synthesizer

reference frequency

−

250

−

kHz

RDR1

programmable reference divider

ratio

4

−

16

ND1

fix main divider ratio

−

1120

−

charge-pump current

fixed

−

0.30

−

mA

Converter synthesizer

step size

100

−

500

kHz

RD2

fix reference divider ratio

−

2

−

RDR2

programmable reference divider

ratio

see Tables 4 and 5

4

−

160

ND2

fix main divider ratio

−

4

−

NDR2

programmable main divider

ratio

see Tables 4 and 5

290

−

1800

3-wire bus

input LOW level

−−

0.8

V

input HIGH level

2.4

−−

V

Lock detect pin

output voltage (LOCK)

−

5

−

V

output voltage (UNLOCK)

−

0.02

−

V

Serial control clock

clock frequency

−

330

−

kHz

input data to CLK set-up time

see Fig.8

−

2

−µs

input data to CLK hold time

see Fig.8

−

1

−µs

delay to rising clock edge

see Fig.8

−

3

−µs

delay from last clock edge

see Fig.8

−

3

−µs

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT