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TC1275 データシート(PDF) 5 Page - Microchip Technology |
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TC1275 データシート(HTML) 5 Page - Microchip Technology |
5 / 12 page © 2007 Microchip Technology Inc. DS21383C-page 5 TC1275/TC1276/TC1277 3.2 VCC Transient Rejection The TC1275/TC1276/TC1277 provides accurate VCC monitoring and reset timing during power-up, power- down, and brownout/sag conditions, and rejects negative-going transients (glitches) on the power supply line. Figure 3-5 shows the maximum transient duration vs. maximum negative excursion (overdrive) for glitch rejection. Any combination of duration and overdrive that lays under the curve will not generate a reset signal. Combinations above the curve are detected as a brownout or power-down. Transient immunity can be improved by adding a capacitor in close proximity to the VCC pin of the TC1275/TC1276/ TC1277. 3.3 RESET Signal Integrity During Power-Down The TC1275 RESET output is valid to VCC = 1.2V. Below this voltage the output becomes an "open circuit" and does not sink current. This means CMOS logic inputs to the μP will be floating at an undeter- mined voltage. Most digital systems are completely shut down well above this voltage. However, in situa- tions where RESET must be maintained valid to VCC = 0V, a pull-down resistor must be connected from RESET to ground to discharge stray capacitances and hold the output low (Figure 3-6). This resistor value, though not critical, should be chosen such that it does not appreciably load RESET under normal operation (100 k Ω will be suitable for most applications). Simi- larly, a pull-up resistor to VCC is required for the TC1277 to ensure a valid high RESET for VCC below 1.8V. FIGURE 3-5: Maximum Transient Duration Vs. Overdrive For Glitch Rejection At +25°C. FIGURE 3-6: ENSURING RESET VALID TO VCC = 0V. RESET COMPARATOR OVERDRIVE, [V CCTP - VCC] (mV) 500 300 200 400 100 0 1 10 100 1000 TA °C VTH Duration Overdrive VCC TC1275/6/7 TC1275 VCC VCC R1 100k RESET GND |
同様の部品番号 - TC1275_07 |
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同様の説明 - TC1275_07 |
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