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SN74ALVC7804-40DL データシート(PDF) 1 Page - Texas Instruments

部品番号 SN74ALVC7804-40DL
部品情報  512 횞 18 FIRST-IN, FIRST-OUT MEMORY
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
Logo TI - Texas Instruments

SN74ALVC7804-40DL データシート(HTML) 1 Page - Texas Instruments

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SN74ALVC7804
512
× 18
FIRST-IN, FIRST-OUT MEMORY
SCAS432 – JANUARY 1995
Copyright
© 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Operates at 3-V to 3.6-V V
CC
Load Clock and Unload Clock Can Be
Asynchronous or Coincident
Low-Power Advanced CMOS Technology
Full, Empty, and Half-Full Flags
Programmable Almost-Full/Almost-Empty
Flag
Fast Access Times of 18 ns With a 50-pF
Load and All Data Outputs Switching
Simultaneously
Data Rates From 0 to 40 MHz
3-State Outputs
Pin Compatible With SN74ACT7804
Packaged in Shrink Small-Outline 300-mil
Package (DL) Using 25-mil Center-to-Center
Spacing
description
A FIFO memory is a storage device that allows
data to be written into and read from its array at
independent data rates. The SN74ALVC7804 is
an 18-bit FIFO with high speed and fast access
times. Data is processed at rates up to 40 MHz
with access times of 18 ns in a bit-parallel format.
The SN74ALVC7804 is designed for 3-V to 3.6-V
VCC operation.
Data is written into memory on a low-to-high
transition of the load clock (LDCK) and is read out
on a low-to-high transition of the unload clock
(UNCK). The memory is full when the number of
words clocked in exceeds the number of words clocked out by 512. When the memory is full, LDCK has no effect
on the data residing in memory. When the memory is empty, UNCK has no effect.
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost-
full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory
is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output
is high whenever the FIFO contains 256 or more words and is low when it contains 255 or less words. The AF/AE
status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to
program the almost-empty offset value (X) and the almost-full offset value (Y), if program enable (PEN) is low.
The AF/AE flag is high when the FIFO contains X or less words or (512 minus Y) or more words. The AF/AE
flag is low when the FIFO contains between (X plus 1) and (511 minus Y) words.
A low level on the reset (RESET) resets the internal stack pointers and sets FULL high, AF/AE high, HF low,
and EMPTY low. The Q outputs are not reset to any specific logic level. The FIFO must be reset upon power
up. The first word loaded into empty memory causes EMPTY to go high and the data to appear on the Q outputs.
The data outputs are in the high-impedance state when the output-enable (OE) is high.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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RESET
D17
D16
D15
D14
D13
D12
D11
D10
VCC
D9
D8
GND
D7
D6
D5
D4
D3
D2
D1
D0
HF
PEN
AF/AE
LDCK
NC
NC
FULL
OE
Q17
Q16
Q15
GND
Q14
VCC
Q13
Q12
Q11
Q10
Q9
GND
Q8
Q7
Q6
Q5
VCC
Q4
Q3
Q2
GND
Q1
Q0
UNCK
NC
NC
EMPTY
DL PACKAGE
(TOP VIEW)


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