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TDA8706A データシート(PDF) 9 Page - NXP Semiconductors |
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TDA8706A データシート(HTML) 9 Page - NXP Semiconductors |
9 / 20 page 1996 Jul 30 9 Philips Semiconductors Product specification 6-bit analog-to-digital converter with multiplexer and clamp TDA8706A Table 1 Output coding and input voltage (typical values) Table 2 Clamping input level (VCLPR, VCLPG and VCLPB) Note 1. Use capacitor ≥10 pF to VSSA. Table 3 Clamp and inputs RED, GREEN and BLUE; VDDA =VDDD =VDDO =3V Note 1. Where X = don’t care. Table 4 Clamping characteristic related to TV signals STEP Vi(p-p) (V) BINARY OUTPUT BITS VDDA =VDDD =3V VDDA =VDDD = 5 V D5 D4 D3 D2 D1 D0 Underflow <VDDA − 1.1 <VDDA − 1.06 0 0 0 0 0 0 0VDDA − 1.1 VDDA − 1.06 0 0 0 0 0 0 1 . . 0 00001 . . . . ..... . . . . ..... 62 . . 111110 63 VDDA − 0.4 VDDA − 0.4 111111 Overflow >VDDA − 0.4 >VDDA − 0.4 111111 VCLPR, VCLPG AND VCLPB CLAMPING LEVEL Open-circuit(1) code 0 Vcode −9 to Vcode 20 code −9 to code 20 SR or SG or SB CLAMP VCLPR, VCLPG or VCLPB Vi RED or GREEN or BLUE DIGITAL OUTPUTS 0 1 open VDDA − 1.1 V X(1) VCLP VCLP 1 open VDDA − 1.1 V 0 VCLP VCLP code (VCLP) PARAMETER MIN. TYP. MAX. UNIT Clamping time per line (signal active) 2.2 3.0 −µs Input signals clamped to correct level − 3 10 lines |
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同様の説明 - TDA8706A |
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